109 lines
3.0 KiB
C
109 lines
3.0 KiB
C
/*
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* Copyright (c) 2020 ITE Corporation. All Rights Reserved.
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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*/
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#ifndef RISCV_CSR_ENCODING_H
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#define RISCV_CSR_ENCODING_H
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#define MSTATUS_UIE 0x00000001
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#define MSTATUS_SIE 0x00000002
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#define MSTATUS_HIE 0x00000004
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#define MSTATUS_MIE 0x00000008
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#define MSTATUS_UPIE 0x00000010
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#define MSTATUS_SPIE 0x00000020
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#define MSTATUS_HPIE 0x00000040
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#define MSTATUS_MPIE 0x00000080
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#define MSTATUS_SPP 0x00000100
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#define MSTATUS_HPP 0x00000600
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#define MSTATUS_MPP 0x00001800
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#define MSTATUS_FS 0x00006000
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#define MSTATUS_XS 0x00018000
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#define MSTATUS_MPRV 0x00020000
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#define MSTATUS_PUM 0x00040000
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#define MSTATUS_MXR 0x00080000
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#define MSTATUS_VM 0x1F000000
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#define MSTATUS32_SD 0x80000000
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#define MSTATUS64_SD 0x8000000000000000
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#define MCAUSE32_CAUSE 0x7FFFFFFF
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#define MCAUSE64_CAUSE 0x7FFFFFFFFFFFFFFF
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#define MCAUSE32_INT 0x80000000
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#define MCAUSE64_INT 0x8000000000000000
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#define SSTATUS_UIE 0x00000001
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#define SSTATUS_SIE 0x00000002
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#define SSTATUS_UPIE 0x00000010
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#define SSTATUS_SPIE 0x00000020
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#define SSTATUS_SPP 0x00000100
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#define SSTATUS_FS 0x00006000
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#define SSTATUS_XS 0x00018000
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#define SSTATUS_PUM 0x00040000
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#define SSTATUS32_SD 0x80000000
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#define SSTATUS64_SD 0x8000000000000000
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#define MIP_SSIP (1 << IRQ_S_SOFT)
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#define MIP_HSIP (1 << IRQ_H_SOFT)
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#define MIP_MSIP (1 << IRQ_M_SOFT)
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#define MIP_STIP (1 << IRQ_S_TIMER)
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#define MIP_HTIP (1 << IRQ_H_TIMER)
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#define MIP_MTIP (1 << IRQ_M_TIMER)
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#define MIP_SEIP (1 << IRQ_S_EXT)
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#define MIP_HEIP (1 << IRQ_H_EXT)
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#define MIP_MEIP (1 << IRQ_M_EXT)
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#define SIP_SSIP MIP_SSIP
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#define SIP_STIP MIP_STIP
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#define PRV_U 0
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#define PRV_S 1
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#define PRV_H 2
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#define PRV_M 3
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#define VM_MBARE 0
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#define VM_MBB 1
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#define VM_MBBID 2
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#define VM_SV32 8
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#define VM_SV39 9
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#define VM_SV48 10
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#define IRQ_S_SOFT 1
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#define IRQ_H_SOFT 2
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#define IRQ_M_SOFT 3
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#define IRQ_S_TIMER 5
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#define IRQ_H_TIMER 6
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#define IRQ_M_TIMER 7
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#define IRQ_S_EXT 9
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#define IRQ_H_EXT 10
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#define IRQ_M_EXT 11
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#define IRQ_COP 12
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#define IRQ_HOST 13
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#define DEFAULT_RSTVEC 0x00001000
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#define DEFAULT_NMIVEC 0x00001004
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#define DEFAULT_MTVEC 0x00001010
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#define EXT_IO_BASE 0x40000000
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#define DRAM_BASE 0x80000000
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#ifdef __riscv64
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# define MSTATUS_SD MSTATUS64_SD
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# define SSTATUS_SD SSTATUS64_SD
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# define MCAUSE_INT MCAUSE64_INT
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# define MCAUSE_CAUSE MCAUSE64_CAUSE
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# define RISCV_PGLEVEL_BITS 9
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#else
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# define MSTATUS_SD MSTATUS32_SD
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# define SSTATUS_SD SSTATUS32_SD
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# define RISCV_PGLEVEL_BITS 10
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# define MCAUSE_INT MCAUSE32_INT
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# define MCAUSE_CAUSE MCAUSE32_CAUSE
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#endif /* __riscv64 */
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#define RISCV_PGSHIFT 12
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#define RISCV_PGSIZE (1 << RISCV_PGSHIFT)
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#endif
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