85 lines
2.7 KiB
C
85 lines
2.7 KiB
C
/*
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* Copyright (c) 2018 AJ Palmer
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include <kernel.h>
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#include <device.h>
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#include <init.h>
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#include <pinmux.h>
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#include <sys_io.h>
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#include <pinmux/stm32/pinmux_stm32.h>
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/* NUCLEO-F746ZG pin configurations
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*
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* WARNING: The pin PA7 will conflict on selection of SPI_1 and ETH_STM32_HAL.
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* If you require both peripherals, and you do not need Arduino Uno v3
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* comaptability, the pin PB5 (also on ST Zio connector) can be used
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* for the SPI_1 MOSI signal.
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*/
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static const struct pin_config pinconf[] = {
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#ifdef CONFIG_UART_2
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{ STM32_PIN_PD5, STM32F7_PINMUX_FUNC_PD5_USART2_TX },
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{ STM32_PIN_PD6, STM32F7_PINMUX_FUNC_PD6_USART2_RX },
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{ STM32_PIN_PD4, STM32F7_PINMUX_FUNC_PD4_USART2_RTS },
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{ STM32_PIN_PD3, STM32F7_PINMUX_FUNC_PD3_USART2_CTS },
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#endif
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#ifdef CONFIG_UART_3
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{ STM32_PIN_PD8, STM32F7_PINMUX_FUNC_PD8_USART3_TX },
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{ STM32_PIN_PD9, STM32F7_PINMUX_FUNC_PD9_USART3_RX },
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#endif
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#ifdef CONFIG_UART_6
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{ STM32_PIN_PG14, STM32F7_PINMUX_FUNC_PG14_USART6_TX },
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{ STM32_PIN_PG9, STM32F7_PINMUX_FUNC_PG9_USART6_RX },
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#endif
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#ifdef CONFIG_ETH_STM32_HAL
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{ STM32_PIN_PC1, STM32F7_PINMUX_FUNC_PC1_ETH },
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{ STM32_PIN_PC4, STM32F7_PINMUX_FUNC_PC4_ETH },
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{ STM32_PIN_PC5, STM32F7_PINMUX_FUNC_PC5_ETH },
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{ STM32_PIN_PA1, STM32F7_PINMUX_FUNC_PA1_ETH },
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{ STM32_PIN_PA2, STM32F7_PINMUX_FUNC_PA2_ETH },
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{ STM32_PIN_PA7, STM32F7_PINMUX_FUNC_PA7_ETH },
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{ STM32_PIN_PG11, STM32F7_PINMUX_FUNC_PG11_ETH },
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{ STM32_PIN_PG13, STM32F7_PINMUX_FUNC_PG13_ETH },
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{ STM32_PIN_PB13, STM32F7_PINMUX_FUNC_PB13_ETH },
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#endif /* CONFIG_ETH_STM32_HAL */
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#ifdef CONFIG_USB_DC_STM32
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{ STM32_PIN_PA11, STM32F7_PINMUX_FUNC_PA11_OTG_FS_DM },
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{ STM32_PIN_PA12, STM32F7_PINMUX_FUNC_PA12_OTG_FS_DP },
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#endif /* CONFIG_USB_DC_STM32 */
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#ifdef CONFIG_I2C_1
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{ STM32_PIN_PB8, STM32F7_PINMUX_FUNC_PB8_I2C1_SCL },
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{ STM32_PIN_PB9, STM32F7_PINMUX_FUNC_PB9_I2C1_SDA },
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#endif
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#ifdef CONFIG_PWM_STM32_1
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{ STM32_PIN_PE13, STM32F7_PINMUX_FUNC_PE13_PWM1_CH3 },
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#endif /* CONFIG_PWM_STM32_1 */
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#ifdef CONFIG_SPI_1
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{ STM32_PIN_PA4, STM32F7_PINMUX_FUNC_PA4_SPI1_NSS },
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{ STM32_PIN_PA5, STM32F7_PINMUX_FUNC_PA5_SPI1_SCK },
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{ STM32_PIN_PA6, STM32F7_PINMUX_FUNC_PA6_SPI1_MISO },
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{ STM32_PIN_PA7, STM32F7_PINMUX_FUNC_PA7_SPI1_MOSI },
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#endif /* CONFIG_SPI_1 */
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#ifdef CONFIG_CAN_1
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{STM32_PIN_PD0, STM32F7_PINMUX_FUNC_PD0_CAN_RX},
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{STM32_PIN_PD1, STM32F7_PINMUX_FUNC_PD1_CAN_TX},
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#endif /* CONFIG_CAN_1 */
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#ifdef CONFIG_ADC_1
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{ STM32_PIN_PA0, STM32F7_PINMUX_FUNC_PA0_ADC123_IN0 },
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#endif /* CONFIG_ADC_1 */
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};
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static int pinmux_stm32_init(struct device *port)
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{
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ARG_UNUSED(port);
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stm32_setup_pins(pinconf, ARRAY_SIZE(pinconf));
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return 0;
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}
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SYS_INIT(pinmux_stm32_init, PRE_KERNEL_1,
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CONFIG_PINMUX_STM32_DEVICE_INITIALIZATION_PRIORITY);
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