138 lines
3.9 KiB
C
138 lines
3.9 KiB
C
/*
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* Copyright (c) 2012-2014, Wind River Systems, Inc.
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*
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* Licensed under the Apache License, Version 2.0 (the "License");
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* you may not use this file except in compliance with the License.
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* You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS,
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* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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* See the License for the specific language governing permissions and
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* limitations under the License.
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*/
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/**
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* @file
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* @brief IA-32 IDT Entry code
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*
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* This header file provides code for constructing an IA-32 interrupt
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* descriptor.
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*/
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#ifndef _IDTENT_H
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#define _IDTENT_H
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#ifdef __cplusplus
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extern "C" {
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#endif
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/**
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* Bitmask used to determine which exceptions result in an error code being
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* pushed onto the stack. The following exception vectors push an error code:
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*
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* Vector Mnemonic Description
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* ------ ------- ----------------------
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* 8 #DF Double Fault
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* 10 #TS Invalid TSS
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* 11 #NP Segment Not Present
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* 12 #SS Stack Segment Fault
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* 13 #GP General Protection Fault
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* 14 #PF Page Fault
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* 17 #AC Alignment Check
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*/
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#define _EXC_ERROR_CODE_FAULTS 0x27d00
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/**
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* @brief Interrupt Descriptor Table (IDT) entry structure
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*
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* See section 6.11 in x86 CPU manual vol. 3A
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*/
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typedef struct idt_entry {
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union {
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uint16_t offset_low;
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uint16_t reserved_task_gate_0;
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};
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uint16_t segment_selector;
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union {
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struct {
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uint8_t reserved:5;
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uint8_t always_0_0:3;
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};
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uint8_t reserved_task_gate_1;
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};
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uint8_t type:3; /* task:101, irq:110, trap:111 */
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uint8_t gate_size:1; /* size of gate, 1: 32-bit, 0:16-bit */
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uint8_t always_0_1:1;
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uint8_t dpl:2; /* Descriptor privilege level */
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uint8_t present:1; /* present yes/no */
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union {
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uint16_t offset_high;
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uint16_t reserved_task_gate_2;
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};
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} __packed IDT_ENTRY;
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/**
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*
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* @brief Create an IDT entry
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*
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* This routine creates an interrupt-gate descriptor at the location defined by
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* @a pIdtEntry. The entry is created such that @a routine is invoked when an
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* interrupt vector is asserted. The @a dpl argument specifies the privilege
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* level for the interrupt-gate descriptor; (hardware) interrupts and exceptions
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* should specify a level of 0, whereas handlers for user-mode software generated
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* interrupts should specify 3.
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*
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* @param pIdtEntry Pointer to where the entry is be built
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* @param routine Routine to call when interrupt occurs
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* @param dpl Private level for interrupt descriptor
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* @return N/A
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*
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* INTERNAL
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* This is a shared routine between the IA-32 nanokernel runtime code and the
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* genIdt host tool code. It is done this way to keep the two sides in sync.
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*
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* The runtime passes a pointer directly to the IDT entry to update whereas the
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* host side simply passes a pointer to a local variable.
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*
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*/
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static inline void _IdtEntCreate(unsigned long long *pIdtEntry,
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void (*routine)(void *),
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unsigned int dpl)
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{
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unsigned long *pIdtEntry32 = (unsigned long *)pIdtEntry;
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pIdtEntry32[0] = (KERNEL_CODE_SEG_SELECTOR << 16) |
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((unsigned short)(unsigned int)routine);
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/*
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* The constant 0x8e00 results from the following:
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*
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* Segment Present = 1
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*
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* Descriptor Privilege Level (DPL) = 0 (dpl arg will be or'ed in)
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*
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* Interrupt Gate Indicator = 0xE
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* The _IntEnt() and _ExcEnt() stubs assume that an interrupt-gate
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* descriptor is used, and thus they do not issue a 'cli' instruction
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* given that the processor automatically clears the IF flag when
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* accessing the interrupt/exception handler via an interrupt-gate.
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*
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* Size of Gate (D) = 1
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*
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* Reserved = 0
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*/
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pIdtEntry32[1] = ((unsigned int) routine & 0xffff0000) |
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(0x8e00 | (dpl << 13));
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}
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#ifdef __cplusplus
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}
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#endif
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#endif /* _IDTENT_H */
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