210 lines
3.4 KiB
Plaintext
210 lines
3.4 KiB
Plaintext
#
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# Copyright (c) 2014 Wind River Systems, Inc.
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# Copyright (c) 2015-2016 Intel Corporation
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#
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# Licensed under the Apache License, Version 2.0 (the "License");
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# you may not use this file except in compliance with the License.
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# You may obtain a copy of the License at
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#
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# http://www.apache.org/licenses/LICENSE-2.0
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#
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# Unless required by applicable law or agreed to in writing, software
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# distributed under the License is distributed on an "AS IS" BASIS,
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# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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# See the License for the specific language governing permissions and
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# limitations under the License.
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#
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if SOC_QUARK_SE_SS
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config SOC
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default quark_se_ss
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config NUM_IRQ_PRIO_LEVELS
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# This processor supports only 2 priority levels:
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# 0 for Fast Interrupts (FIRQs) and 1 for Regular Interrupts (IRQs).
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default 2
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config NUM_REGULAR_IRQ_PRIO_LEVELS
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# This processor supports only 1 Regular Interrupt priority level (1).
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default 1
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config NUM_IRQS
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# must be > the highest interrupt number used
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default 68
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config SYS_CLOCK_HW_CYCLES_PER_SEC
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default 32000000
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config RAM_START
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default 0x4000 if NSIM
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default 0xa8000400
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config RAM_SIZE
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default 16 if NSIM
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default 24
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if GPIO
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config GPIO_DW
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def_bool y
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if GPIO_DW
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config GPIO_DW_BOTHEDGES_SUPPORT
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default n
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config GPIO_DW_0
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def_bool y
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if GPIO_DW_0
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config GPIO_DW_0_PRI
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default 2
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endif # GPIO_DW_0
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config GPIO_DW_1
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def_bool y
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if GPIO_DW_1
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config GPIO_DW_1_PRI
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default 2
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endif # GPIO_DW_1
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endif # GPIO_DW
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endif # GPIO
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if I2C
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config I2C_QUARK_SE_SS
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def_bool y
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if I2C_QUARK_SE_SS
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config I2C_QUARK_SE_SS_0
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def_bool y
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if I2C_QUARK_SE_SS_0
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config I2C_QUARK_SE_SS_0_NAME
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default "I2C0"
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config I2C_QUARK_SE_SS_0_DEFAULT_CFG
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default 0x12
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endif # I2C_QUARK_SE_SS_0
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if I2C_QUARK_SE_SS_1
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config I2C_QUARK_SE_SS_1_NAME
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default "I2C1"
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config I2C_QUARK_SE_SS_1_DEFAULT_CFG
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default 0x12
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endif # I2C_QUARK_SE_SS_1
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endif # I2C_QUARK_SE_SS
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endif # I2C
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if UART_NS16550
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config UART_NS16550_PORT_0
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def_bool y
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if UART_NS16550_PORT_0
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config UART_NS16550_PORT_0_NAME
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default "UART_0"
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config UART_NS16550_PORT_0_IRQ_PRI
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default 1
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config UART_NS16550_PORT_0_BAUD_RATE
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default 115200
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config UART_NS16550_PORT_0_OPTIONS
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default 0
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endif # UART_NS16550_PORT_0
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config UART_NS16550_PORT_1
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def_bool y
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if UART_NS16550_PORT_1
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config UART_NS16550_PORT_1_NAME
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default "UART_1"
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config UART_NS16550_PORT_1_IRQ_PRI
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default 1
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config UART_NS16550_PORT_1_BAUD_RATE
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default 115200
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config UART_NS16550_PORT_1_OPTIONS
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default 0
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endif # UART_NS16550_PORT_1
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endif # UART_NS16550
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if UART_CONSOLE
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config UART_CONSOLE_ON_DEV_NAME
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default "UART_1"
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endif
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if SPI
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config SPI_DW
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def_bool y
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if SPI_DW
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config SPI_DW_CLOCK_GATE
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def_bool n
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config SPI_DW_PORT_0
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def_bool y
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if SPI_DW_PORT_0
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config SPI_DW_PORT_0_PRI
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default 1
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config SPI_DW_PORT_0_REGS
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default 0x80010000
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config SPI_DW_PORT_0_ERROR_IRQ
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default 30
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config SPI_DW_PORT_0_RX_IRQ
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default 31
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config SPI_DW_PORT_0_TX_IRQ
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default 32
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endif # SPI_DW_PORT_0
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config SPI_DW_PORT_1
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def_bool y
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if SPI_DW_PORT_1
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config SPI_DW_PORT_1_PRI
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default 1
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config SPI_DW_PORT_1_REGS
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default 0x80010100
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config SPI_DW_PORT_1_ERROR_IRQ
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default 33
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config SPI_DW_PORT_1_RX_IRQ
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default 34
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config SPI_DW_PORT_1_TX_IRQ
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default 35
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endif # SPI_DW_PORT_1
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endif # SPI_DW
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endif # SPI
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endif #SOC_QUARK_SE_ARC
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