86 lines
1.9 KiB
Plaintext
86 lines
1.9 KiB
Plaintext
/* Copyright (C) 2023 BeagleBoard.org Foundation
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* Copyright (C) 2023 S Prashanth
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* Copyright (c) 2024 Texas Instruments Incorporated
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* Andrew Davis <afd@ti.com>
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include <mem.h>
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#include <freq.h>
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#include <arm/armv7-r.dtsi>
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#include <zephyr/dt-bindings/interrupt-controller/ti-vim.h>
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/ {
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#address-cells = <1>;
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#size-cells = <1>;
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cpus {
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#address-cells = <1>;
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#size-cells = <0>;
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cpu0: cpu@0 {
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device_type = "cpu";
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compatible = "arm,cortex-r5";
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reg = <0>;
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};
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};
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atcm: memory@0 {
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device_type = "memory";
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compatible = "zephyr,memory-region", "mmio-sram";
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reg = <0x00000000 DT_SIZE_K(32)>;
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zephyr,memory-region = "ATCM";
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};
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btcm: memory@41010000 {
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device_type = "memory";
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compatible = "zephyr,memory-region", "mmio-sram";
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reg = <0x41010000 DT_SIZE_K(32)>;
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zephyr,memory-region = "BTCM";
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};
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vim: interrupt-controller@ff80000 {
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#address-cells = <1>;
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compatible = "ti,vim";
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reg = <0x0ff80000 0x2800>;
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interrupt-controller;
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#interrupt-cells = <4>; /* {IRQ/FIQ, IRQ_NUM, IRQ_TYPE, IRQ_PRIO} */
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status = "okay";
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};
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pinctrl: pinctrl@11c000 {
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compatible = "ti,k3-pinctrl";
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reg = <0x0011c000 0x2b4>;
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status = "okay";
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};
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uart1: uart@2810000 {
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compatible = "ns16550";
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reg = <0x02810000 0x100>;
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clock-frequency = <48000000>;
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interrupts = <0 159 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>;
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interrupt-parent = <&vim>;
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reg-shift = <2>;
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status = "disabled";
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};
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uart2: uart@2820000 {
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compatible = "ns16550";
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reg = <0x02820000 0x100>;
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clock-frequency = <48000000>;
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interrupts = <0 160 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>;
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interrupt-parent = <&vim>;
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reg-shift = <2>;
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status = "disabled";
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};
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systick_timer: timer@24c0000 {
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compatible = "ti,am654-timer";
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reg = <0x24c0000 0x70>;
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interrupts = <0 168 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>;
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interrupt-parent = <&vim>;
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status = "disabled";
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};
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};
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