347 lines
7.7 KiB
Plaintext
347 lines
7.7 KiB
Plaintext
/*
|
|
* Copyright (c) 2020 Nordic Semiconductor ASA
|
|
*
|
|
* SPDX-License-Identifier: Apache-2.0
|
|
*/
|
|
|
|
#include <arm/armv7-m.dtsi>
|
|
#include <nordic/nrf_common.dtsi>
|
|
#include <zephyr/dt-bindings/adc/nrf-saadc-v2.h>
|
|
#include <zephyr/dt-bindings/regulator/nrf5x.h>
|
|
|
|
/ {
|
|
chosen {
|
|
zephyr,bt-hci = &bt_hci_controller;
|
|
zephyr,entropy = &rng;
|
|
zephyr,flash-controller = &flash_controller;
|
|
};
|
|
|
|
cpus {
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
|
|
cpu@0 {
|
|
device_type = "cpu";
|
|
compatible = "arm,cortex-m4";
|
|
reg = <0>;
|
|
};
|
|
};
|
|
|
|
soc {
|
|
ficr: ficr@10000000 {
|
|
compatible = "nordic,nrf-ficr";
|
|
reg = <0x10000000 0x1000>;
|
|
#nordic,ficr-cells = <1>;
|
|
status = "okay";
|
|
};
|
|
|
|
uicr: uicr@10001000 {
|
|
compatible = "nordic,nrf-uicr";
|
|
reg = <0x10001000 0x1000>;
|
|
status = "okay";
|
|
};
|
|
|
|
sram0: memory@20000000 {
|
|
compatible = "mmio-sram";
|
|
};
|
|
|
|
clock: clock@40000000 {
|
|
compatible = "nordic,nrf-clock";
|
|
reg = <0x40000000 0x1000>;
|
|
interrupts = <0 NRF_DEFAULT_IRQ_PRIORITY>;
|
|
status = "okay";
|
|
};
|
|
|
|
power: power@40000000 {
|
|
compatible = "nordic,nrf-power";
|
|
reg = <0x40000000 0x1000>;
|
|
interrupts = <0 NRF_DEFAULT_IRQ_PRIORITY>;
|
|
status = "okay";
|
|
#address-cells = <1>;
|
|
#size-cells = <1>;
|
|
|
|
gpregret1: gpregret1@4000051c {
|
|
#address-cells = <1>;
|
|
#size-cells = <1>;
|
|
compatible = "nordic,nrf-gpregret";
|
|
reg = <0x4000051c 0x1>;
|
|
status = "okay";
|
|
};
|
|
|
|
gpregret2: gpregret2@40000520 {
|
|
#address-cells = <1>;
|
|
#size-cells = <1>;
|
|
compatible = "nordic,nrf-gpregret";
|
|
reg = <0x40000520 0x1>;
|
|
status = "okay";
|
|
};
|
|
|
|
reg: regulator@40000578 {
|
|
compatible = "nordic,nrf5x-regulator";
|
|
reg = <0x40000578 0x1>;
|
|
regulator-name = "REG";
|
|
regulator-initial-mode = <NRF5X_REG_MODE_LDO>;
|
|
};
|
|
};
|
|
|
|
bprot: bprot@40000000 {
|
|
compatible = "nordic,nrf-bprot";
|
|
reg = <0x40000000 0x1000>;
|
|
status = "okay";
|
|
};
|
|
|
|
radio: radio@40001000 {
|
|
compatible = "nordic,nrf-radio";
|
|
reg = <0x40001000 0x1000>;
|
|
interrupts = <1 NRF_DEFAULT_IRQ_PRIORITY>;
|
|
status = "okay";
|
|
ble-2mbps-supported;
|
|
|
|
/* Note: In the nRF Connect SDK the SoftDevice Controller
|
|
* is added and set as the default Bluetooth Controller.
|
|
*/
|
|
bt_hci_controller: bt_hci_controller {
|
|
compatible = "zephyr,bt-hci-ll-sw-split";
|
|
status = "okay";
|
|
};
|
|
};
|
|
|
|
uart0: uart@40002000 {
|
|
/* uart can be either UART or UARTE, for the user to pick */
|
|
/* compatible = "nordic,nrf-uarte" or "nordic,nrf-uart"; */
|
|
compatible = "nordic,nrf-uarte";
|
|
reg = <0x40002000 0x1000>;
|
|
interrupts = <2 NRF_DEFAULT_IRQ_PRIORITY>;
|
|
status = "disabled";
|
|
};
|
|
|
|
i2c0: i2c@40003000 {
|
|
/*
|
|
* This i2c node can be TWI, TWIM, or TWIS,
|
|
* for the user to pick:
|
|
* compatible = "nordic,nrf-twi" or
|
|
* "nordic,nrf-twim" or
|
|
* "nordic,nrf-twis".
|
|
*/
|
|
compatible = "nordic,nrf-twim";
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
reg = <0x40003000 0x1000>;
|
|
interrupts = <3 NRF_DEFAULT_IRQ_PRIORITY>;
|
|
easydma-maxcnt-bits = <14>;
|
|
status = "disabled";
|
|
zephyr,pm-device-runtime-auto;
|
|
};
|
|
|
|
spi0: spi@40004000 {
|
|
/*
|
|
* This spi node can be SPI, SPIM, or SPIS,
|
|
* for the user to pick:
|
|
* compatible = "nordic,nrf-spi" or
|
|
* "nordic,nrf-spim" or
|
|
* "nordic,nrf-spis".
|
|
*/
|
|
compatible = "nordic,nrf-spim";
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
reg = <0x40004000 0x1000>;
|
|
interrupts = <4 NRF_DEFAULT_IRQ_PRIORITY>;
|
|
max-frequency = <DT_FREQ_M(8)>;
|
|
easydma-maxcnt-bits = <14>;
|
|
status = "disabled";
|
|
};
|
|
|
|
gpiote: gpiote0: gpiote@40006000 {
|
|
compatible = "nordic,nrf-gpiote";
|
|
reg = <0x40006000 0x1000>;
|
|
interrupts = <6 5>;
|
|
status = "disabled";
|
|
instance = <0>;
|
|
};
|
|
|
|
adc: adc@40007000 {
|
|
compatible = "nordic,nrf-saadc";
|
|
reg = <0x40007000 0x1000>;
|
|
interrupts = <7 NRF_DEFAULT_IRQ_PRIORITY>;
|
|
status = "disabled";
|
|
#io-channel-cells = <1>;
|
|
};
|
|
|
|
timer0: timer@40008000 {
|
|
compatible = "nordic,nrf-timer";
|
|
status = "disabled";
|
|
reg = <0x40008000 0x1000>;
|
|
cc-num = <4>;
|
|
max-bit-width = <32>;
|
|
interrupts = <8 NRF_DEFAULT_IRQ_PRIORITY>;
|
|
prescaler = <0>;
|
|
};
|
|
|
|
timer1: timer@40009000 {
|
|
compatible = "nordic,nrf-timer";
|
|
status = "disabled";
|
|
reg = <0x40009000 0x1000>;
|
|
cc-num = <4>;
|
|
max-bit-width = <32>;
|
|
interrupts = <9 NRF_DEFAULT_IRQ_PRIORITY>;
|
|
prescaler = <0>;
|
|
};
|
|
|
|
timer2: timer@4000a000 {
|
|
compatible = "nordic,nrf-timer";
|
|
status = "disabled";
|
|
reg = <0x4000a000 0x1000>;
|
|
cc-num = <4>;
|
|
max-bit-width = <32>;
|
|
interrupts = <10 NRF_DEFAULT_IRQ_PRIORITY>;
|
|
prescaler = <0>;
|
|
};
|
|
|
|
rtc0: rtc@4000b000 {
|
|
compatible = "nordic,nrf-rtc";
|
|
reg = <0x4000b000 0x1000>;
|
|
cc-num = <3>;
|
|
interrupts = <11 NRF_DEFAULT_IRQ_PRIORITY>;
|
|
status = "disabled";
|
|
clock-frequency = <32768>;
|
|
prescaler = <1>;
|
|
};
|
|
|
|
temp: temp@4000c000 {
|
|
compatible = "nordic,nrf-temp";
|
|
reg = <0x4000c000 0x1000>;
|
|
interrupts = <12 NRF_DEFAULT_IRQ_PRIORITY>;
|
|
status = "okay";
|
|
};
|
|
|
|
rng: random@4000d000 {
|
|
compatible = "nordic,nrf-rng";
|
|
reg = <0x4000d000 0x1000>;
|
|
interrupts = <13 NRF_DEFAULT_IRQ_PRIORITY>;
|
|
status = "okay";
|
|
};
|
|
|
|
ecb: ecb@4000e000 {
|
|
compatible = "nordic,nrf-ecb";
|
|
reg = <0x4000e000 0x1000>;
|
|
interrupts = <14 NRF_DEFAULT_IRQ_PRIORITY>;
|
|
status = "okay";
|
|
};
|
|
|
|
ccm: ccm@4000f000 {
|
|
compatible = "nordic,nrf-ccm";
|
|
reg = <0x4000f000 0x1000>;
|
|
interrupts = <15 NRF_DEFAULT_IRQ_PRIORITY>;
|
|
length-field-length-8-bits;
|
|
status = "okay";
|
|
};
|
|
|
|
wdt: wdt0: watchdog@40010000 {
|
|
compatible = "nordic,nrf-wdt";
|
|
reg = <0x40010000 0x1000>;
|
|
interrupts = <16 NRF_DEFAULT_IRQ_PRIORITY>;
|
|
status = "okay";
|
|
};
|
|
|
|
rtc1: rtc@40011000 {
|
|
compatible = "nordic,nrf-rtc";
|
|
reg = <0x40011000 0x1000>;
|
|
cc-num = <4>;
|
|
interrupts = <17 NRF_DEFAULT_IRQ_PRIORITY>;
|
|
status = "disabled";
|
|
clock-frequency = <32768>;
|
|
prescaler = <1>;
|
|
};
|
|
|
|
qdec: qdec0: qdec@40012000 {
|
|
compatible = "nordic,nrf-qdec";
|
|
reg = <0x40012000 0x1000>;
|
|
interrupts = <18 NRF_DEFAULT_IRQ_PRIORITY>;
|
|
status = "disabled";
|
|
};
|
|
|
|
egu0: swi0: egu@40014000 {
|
|
compatible = "nordic,nrf-egu", "nordic,nrf-swi";
|
|
reg = <0x40014000 0x1000>;
|
|
interrupts = <20 NRF_DEFAULT_IRQ_PRIORITY>;
|
|
status = "okay";
|
|
};
|
|
|
|
egu1: swi1: egu@40015000 {
|
|
compatible = "nordic,nrf-egu", "nordic,nrf-swi";
|
|
reg = <0x40015000 0x1000>;
|
|
interrupts = <21 NRF_DEFAULT_IRQ_PRIORITY>;
|
|
status = "okay";
|
|
};
|
|
|
|
swi2: swi@40016000 {
|
|
compatible = "nordic,nrf-swi";
|
|
reg = <0x40016000 0x1000>;
|
|
interrupts = <22 NRF_DEFAULT_IRQ_PRIORITY>;
|
|
status = "okay";
|
|
};
|
|
|
|
swi3: swi@40017000 {
|
|
compatible = "nordic,nrf-swi";
|
|
reg = <0x40017000 0x1000>;
|
|
interrupts = <23 NRF_DEFAULT_IRQ_PRIORITY>;
|
|
status = "okay";
|
|
};
|
|
|
|
swi4: swi@40018000 {
|
|
compatible = "nordic,nrf-swi";
|
|
reg = <0x40018000 0x1000>;
|
|
interrupts = <24 NRF_DEFAULT_IRQ_PRIORITY>;
|
|
status = "okay";
|
|
};
|
|
|
|
swi5: swi@40019000 {
|
|
compatible = "nordic,nrf-swi";
|
|
reg = <0x40019000 0x1000>;
|
|
interrupts = <25 NRF_DEFAULT_IRQ_PRIORITY>;
|
|
status = "okay";
|
|
};
|
|
|
|
flash_controller: flash-controller@4001e000 {
|
|
compatible = "nordic,nrf52-flash-controller";
|
|
reg = <0x4001e000 0x1000>;
|
|
partial-erase;
|
|
|
|
#address-cells = <1>;
|
|
#size-cells = <1>;
|
|
|
|
|
|
flash0: flash@0 {
|
|
compatible = "soc-nv-flash";
|
|
erase-block-size = <4096>;
|
|
write-block-size = <4>;
|
|
};
|
|
};
|
|
|
|
ppi: ppi@4001f000 {
|
|
compatible = "nordic,nrf-ppi";
|
|
reg = <0x4001f000 0x1000>;
|
|
status = "okay";
|
|
};
|
|
|
|
gpio0: gpio@50000000 {
|
|
compatible = "nordic,nrf-gpio";
|
|
gpio-controller;
|
|
reg = <0x50000000 0x1000>;
|
|
#gpio-cells = <2>;
|
|
status = "disabled";
|
|
port = <0>;
|
|
gpiote-instance = <&gpiote>;
|
|
};
|
|
};
|
|
};
|
|
|
|
&nvic {
|
|
arm,num-irq-priority-bits = <3>;
|
|
};
|
|
|
|
&systick {
|
|
/* Use RTC for system clock, instead of SysTick. */
|
|
status = "disabled";
|
|
};
|