zephyr/dts/arc/emsk.dtsi

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#include "skeleton.dtsi"
#include <dt-bindings/i2c/i2c.h>
/ {
soc {
#address-cells = <1>;
#size-cells = <1>;
compatible = "simple-bus";
ranges;
sram0: memory@10000000 {
device_type = "memory";
compatible = "mmio-sram";
reg = <0x10000000 0x8000000>;
};
i2c0: i2c@f0004000 {
compatible = "snps,designware-i2c";
clock-frequency = <I2C_BITRATE_STANDARD>;
#address-cells = <1>;
#size-cells = <0>;
reg = <0xf0004000 0x1000>;
label = "I2C_0";
interrupts = <25 1>;
interrupt-parent = <&intc>;
};
i2c1: i2c@f0005000 {
compatible = "snps,designware-i2c";
clock-frequency = <I2C_BITRATE_STANDARD>;
#address-cells = <1>;
#size-cells = <0>;
reg = <0xf0005000 0x1000>;
label = "I2C_1";
interrupts = <26 1>;
interrupt-parent = <&intc>;
};
uart0: uart@f0008000 {
compatible = "ns16550";
reg = <0xf0008000 0x1000>;
label = "UART_0";
interrupts = <29 1>;
interrupt-parent = <&intc>;
status = "disabled";
};
uart1: uart@f0009000 {
compatible = "ns16550";
reg = <0xf0009000 0x1000>;
label = "UART_1";
interrupts = <30 1>;
interrupt-parent = <&intc>;
status = "disabled";
};
uart2: uart@f000a000 {
compatible = "ns16550";
reg = <0xf000a000 0x1000>;
label = "UART_2";
interrupts = <31 1>;
interrupt-parent = <&intc>;
status = "disabled";
};
};
};