33 lines
805 B
C
33 lines
805 B
C
/*
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* Copyright (c) 2017 Jean-Paul Etienne <fractalclone@gmail.com>
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* Copyright (c) 2017 Palmer Dabbelt <palmer@dabbelt.com>
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#ifndef __INC_BOARD_H
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#define __INC_BOARD_H
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#include <soc.h>
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/*
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* UART clock configurations
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*
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* Define them here so that it can be replaced by global variables
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* on other boards where the uart clock is determined dynamically
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* following the PLL configuration
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*/
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#define uart_fe310_port_0_clk_freq 16000000
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#define uart_fe310_port_1_clk_freq 16000000
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/* LEDS configuration */
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#define LED0_GPIO_PORT "gpio0"
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#define LED1_GPIO_PORT "gpio0"
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#define LED2_GPIO_PORT "gpio0"
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#define LED0_GPIO_PIN 19
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#define LED1_GPIO_PIN 21
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#define LED2_GPIO_PIN 22
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#endif /* __INC_BOARD_H */
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