345 lines
9.3 KiB
C
345 lines
9.3 KiB
C
/*
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* Copyright (c) 2018 Foundries.io
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* Copyright (c) 2017, NXP
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#define DT_DRV_COMPAT openisa_rv32m1_lpuart
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#include <errno.h>
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#include <device.h>
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#include <drivers/uart.h>
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#include <drivers/clock_control.h>
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#include <fsl_lpuart.h>
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#include <soc.h>
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struct rv32m1_lpuart_config {
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LPUART_Type *base;
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const struct device *clock_dev;
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clock_control_subsys_t clock_subsys;
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clock_ip_name_t clock_ip_name;
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uint32_t clock_ip_src;
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uint32_t baud_rate;
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uint8_t hw_flow_control;
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#ifdef CONFIG_UART_INTERRUPT_DRIVEN
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void (*irq_config_func)(const struct device *dev);
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#endif
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};
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struct rv32m1_lpuart_data {
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#ifdef CONFIG_UART_INTERRUPT_DRIVEN
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uart_irq_callback_user_data_t callback;
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void *cb_data;
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#endif
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};
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static int rv32m1_lpuart_poll_in(const struct device *dev, unsigned char *c)
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{
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const struct rv32m1_lpuart_config *config = dev->config;
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uint32_t flags = LPUART_GetStatusFlags(config->base);
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int ret = -1;
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if (flags & kLPUART_RxDataRegFullFlag) {
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*c = LPUART_ReadByte(config->base);
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ret = 0;
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}
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return ret;
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}
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static void rv32m1_lpuart_poll_out(const struct device *dev, unsigned char c)
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{
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const struct rv32m1_lpuart_config *config = dev->config;
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while (!(LPUART_GetStatusFlags(config->base)
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& kLPUART_TxDataRegEmptyFlag)) {
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}
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LPUART_WriteByte(config->base, c);
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}
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static int rv32m1_lpuart_err_check(const struct device *dev)
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{
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const struct rv32m1_lpuart_config *config = dev->config;
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uint32_t flags = LPUART_GetStatusFlags(config->base);
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int err = 0;
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if (flags & kLPUART_RxOverrunFlag) {
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err |= UART_ERROR_OVERRUN;
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}
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if (flags & kLPUART_ParityErrorFlag) {
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err |= UART_ERROR_PARITY;
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}
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if (flags & kLPUART_FramingErrorFlag) {
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err |= UART_ERROR_FRAMING;
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}
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LPUART_ClearStatusFlags(config->base, kLPUART_RxOverrunFlag |
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kLPUART_ParityErrorFlag |
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kLPUART_FramingErrorFlag);
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return err;
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}
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#ifdef CONFIG_UART_INTERRUPT_DRIVEN
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static int rv32m1_lpuart_fifo_fill(const struct device *dev,
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const uint8_t *tx_data,
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int len)
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{
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const struct rv32m1_lpuart_config *config = dev->config;
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uint8_t num_tx = 0U;
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while ((len - num_tx > 0) &&
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(LPUART_GetStatusFlags(config->base)
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& kLPUART_TxDataRegEmptyFlag)) {
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LPUART_WriteByte(config->base, tx_data[num_tx++]);
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}
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return num_tx;
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}
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static int rv32m1_lpuart_fifo_read(const struct device *dev, uint8_t *rx_data,
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const int len)
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{
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const struct rv32m1_lpuart_config *config = dev->config;
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uint8_t num_rx = 0U;
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while ((len - num_rx > 0) &&
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(LPUART_GetStatusFlags(config->base)
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& kLPUART_RxDataRegFullFlag)) {
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rx_data[num_rx++] = LPUART_ReadByte(config->base);
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}
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return num_rx;
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}
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static void rv32m1_lpuart_irq_tx_enable(const struct device *dev)
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{
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const struct rv32m1_lpuart_config *config = dev->config;
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uint32_t mask = kLPUART_TxDataRegEmptyInterruptEnable;
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LPUART_EnableInterrupts(config->base, mask);
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}
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static void rv32m1_lpuart_irq_tx_disable(const struct device *dev)
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{
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const struct rv32m1_lpuart_config *config = dev->config;
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uint32_t mask = kLPUART_TxDataRegEmptyInterruptEnable;
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LPUART_DisableInterrupts(config->base, mask);
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}
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static int rv32m1_lpuart_irq_tx_complete(const struct device *dev)
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{
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const struct rv32m1_lpuart_config *config = dev->config;
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uint32_t flags = LPUART_GetStatusFlags(config->base);
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return (flags & kLPUART_TxDataRegEmptyFlag) != 0U;
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}
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static int rv32m1_lpuart_irq_tx_ready(const struct device *dev)
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{
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const struct rv32m1_lpuart_config *config = dev->config;
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uint32_t mask = kLPUART_TxDataRegEmptyInterruptEnable;
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return (LPUART_GetEnabledInterrupts(config->base) & mask)
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&& rv32m1_lpuart_irq_tx_complete(dev);
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}
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static void rv32m1_lpuart_irq_rx_enable(const struct device *dev)
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{
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const struct rv32m1_lpuart_config *config = dev->config;
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uint32_t mask = kLPUART_RxDataRegFullInterruptEnable;
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LPUART_EnableInterrupts(config->base, mask);
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}
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static void rv32m1_lpuart_irq_rx_disable(const struct device *dev)
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{
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const struct rv32m1_lpuart_config *config = dev->config;
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uint32_t mask = kLPUART_RxDataRegFullInterruptEnable;
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LPUART_DisableInterrupts(config->base, mask);
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}
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static int rv32m1_lpuart_irq_rx_full(const struct device *dev)
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{
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const struct rv32m1_lpuart_config *config = dev->config;
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uint32_t flags = LPUART_GetStatusFlags(config->base);
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return (flags & kLPUART_RxDataRegFullFlag) != 0U;
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}
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static int rv32m1_lpuart_irq_rx_pending(const struct device *dev)
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{
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const struct rv32m1_lpuart_config *config = dev->config;
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uint32_t mask = kLPUART_RxDataRegFullInterruptEnable;
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return (LPUART_GetEnabledInterrupts(config->base) & mask)
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&& rv32m1_lpuart_irq_rx_full(dev);
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}
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static void rv32m1_lpuart_irq_err_enable(const struct device *dev)
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{
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const struct rv32m1_lpuart_config *config = dev->config;
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uint32_t mask = kLPUART_NoiseErrorInterruptEnable |
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kLPUART_FramingErrorInterruptEnable |
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kLPUART_ParityErrorInterruptEnable;
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LPUART_EnableInterrupts(config->base, mask);
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}
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static void rv32m1_lpuart_irq_err_disable(const struct device *dev)
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{
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const struct rv32m1_lpuart_config *config = dev->config;
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uint32_t mask = kLPUART_NoiseErrorInterruptEnable |
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kLPUART_FramingErrorInterruptEnable |
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kLPUART_ParityErrorInterruptEnable;
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LPUART_DisableInterrupts(config->base, mask);
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}
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static int rv32m1_lpuart_irq_is_pending(const struct device *dev)
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{
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return (rv32m1_lpuart_irq_tx_ready(dev)
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|| rv32m1_lpuart_irq_rx_pending(dev));
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}
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static int rv32m1_lpuart_irq_update(const struct device *dev)
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{
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return 1;
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}
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static void rv32m1_lpuart_irq_callback_set(const struct device *dev,
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uart_irq_callback_user_data_t cb,
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void *cb_data)
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{
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struct rv32m1_lpuart_data *data = dev->data;
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data->callback = cb;
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data->cb_data = cb_data;
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}
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static void rv32m1_lpuart_isr(const struct device *dev)
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{
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struct rv32m1_lpuart_data *data = dev->data;
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if (data->callback) {
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data->callback(dev, data->cb_data);
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}
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}
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#endif /* CONFIG_UART_INTERRUPT_DRIVEN */
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static int rv32m1_lpuart_init(const struct device *dev)
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{
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const struct rv32m1_lpuart_config *config = dev->config;
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lpuart_config_t uart_config;
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uint32_t clock_freq;
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/* set clock source */
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/* TODO: Don't change if another core has configured */
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CLOCK_SetIpSrc(config->clock_ip_name, config->clock_ip_src);
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if (clock_control_get_rate(config->clock_dev, config->clock_subsys,
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&clock_freq)) {
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return -EINVAL;
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}
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LPUART_GetDefaultConfig(&uart_config);
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uart_config.enableTx = true;
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uart_config.enableRx = true;
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if (config->hw_flow_control) {
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uart_config.enableRxRTS = true;
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uart_config.enableTxCTS = true;
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}
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uart_config.baudRate_Bps = config->baud_rate;
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LPUART_Init(config->base, &uart_config, clock_freq);
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#ifdef CONFIG_UART_INTERRUPT_DRIVEN
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config->irq_config_func(dev);
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#endif
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return 0;
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}
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static const struct uart_driver_api rv32m1_lpuart_driver_api = {
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.poll_in = rv32m1_lpuart_poll_in,
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.poll_out = rv32m1_lpuart_poll_out,
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.err_check = rv32m1_lpuart_err_check,
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#ifdef CONFIG_UART_INTERRUPT_DRIVEN
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.fifo_fill = rv32m1_lpuart_fifo_fill,
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.fifo_read = rv32m1_lpuart_fifo_read,
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.irq_tx_enable = rv32m1_lpuart_irq_tx_enable,
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.irq_tx_disable = rv32m1_lpuart_irq_tx_disable,
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.irq_tx_complete = rv32m1_lpuart_irq_tx_complete,
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.irq_tx_ready = rv32m1_lpuart_irq_tx_ready,
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.irq_rx_enable = rv32m1_lpuart_irq_rx_enable,
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.irq_rx_disable = rv32m1_lpuart_irq_rx_disable,
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.irq_rx_ready = rv32m1_lpuart_irq_rx_full,
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.irq_err_enable = rv32m1_lpuart_irq_err_enable,
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.irq_err_disable = rv32m1_lpuart_irq_err_disable,
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.irq_is_pending = rv32m1_lpuart_irq_is_pending,
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.irq_update = rv32m1_lpuart_irq_update,
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.irq_callback_set = rv32m1_lpuart_irq_callback_set,
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#endif
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};
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#define RV32M1_LPUART_DECLARE_CFG(n, IRQ_FUNC_INIT) \
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static const struct rv32m1_lpuart_config rv32m1_lpuart_##n##_cfg = {\
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.base = (LPUART_Type *)DT_INST_REG_ADDR(n), \
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.clock_dev = DEVICE_DT_GET(DT_INST_CLOCKS_CTLR(n)), \
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.clock_subsys = \
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(clock_control_subsys_t)DT_INST_CLOCKS_CELL(n, name),\
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.clock_ip_name = INST_DT_CLOCK_IP_NAME(n), \
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.clock_ip_src = kCLOCK_IpSrcFircAsync, \
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.baud_rate = DT_INST_PROP(n, current_speed), \
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.hw_flow_control = DT_INST_PROP(n, hw_flow_control), \
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IRQ_FUNC_INIT \
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}
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#ifdef CONFIG_UART_INTERRUPT_DRIVEN
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#define RV32M1_LPUART_CONFIG_FUNC(n) \
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static void rv32m1_lpuart_config_func_##n(const struct device *dev) \
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{ \
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IRQ_CONNECT(DT_INST_IRQN(n), 0, rv32m1_lpuart_isr, \
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DEVICE_DT_INST_GET(n), 0); \
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\
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irq_enable(DT_INST_IRQN(n)); \
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}
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#define RV32M1_LPUART_IRQ_CFG_FUNC_INIT(n) \
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.irq_config_func = rv32m1_lpuart_config_func_##n,
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#define RV32M1_LPUART_INIT_CFG(n) \
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RV32M1_LPUART_DECLARE_CFG(n, RV32M1_LPUART_IRQ_CFG_FUNC_INIT(n))
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#else
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#define RV32M1_LPUART_CONFIG_FUNC(n)
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#define RV32M1_LPUART_IRQ_CFG_FUNC_INIT
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#define RV32M1_LPUART_INIT_CFG(n) \
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RV32M1_LPUART_DECLARE_CFG(n, RV32M1_LPUART_IRQ_CFG_FUNC_INIT)
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#endif
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#define RV32M1_LPUART_INIT(n) \
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static struct rv32m1_lpuart_data rv32m1_lpuart_##n##_data; \
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\
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static const struct rv32m1_lpuart_config rv32m1_lpuart_##n##_cfg;\
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\
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DEVICE_DT_INST_DEFINE(n, \
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&rv32m1_lpuart_init, \
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NULL, \
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&rv32m1_lpuart_##n##_data, \
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&rv32m1_lpuart_##n##_cfg, \
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PRE_KERNEL_1, \
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CONFIG_SERIAL_INIT_PRIORITY, \
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&rv32m1_lpuart_driver_api); \
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\
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RV32M1_LPUART_CONFIG_FUNC(n) \
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\
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RV32M1_LPUART_INIT_CFG(n);
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DT_INST_FOREACH_STATUS_OKAY(RV32M1_LPUART_INIT)
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