25 lines
351 B
Plaintext
25 lines
351 B
Plaintext
/*
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* Copyright (c) 2020 Intel Corporation
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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/dts-v1/;
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#include <mem.h>
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#define DT_DRAM_SIZE DT_SIZE_M(2048)
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#include <elkhart_lake.dtsi>
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/ {
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model = "ehl_crb";
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compatible = "intel,elkhart_lake_crb";
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chosen {
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zephyr,sram = &dram0;
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zephyr,console = &uart2;
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zephyr,shell-uart = &uart2;
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};
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};
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