Charles E. Youse 5a9a33b0cf drivers/interrupt_controller/ioapic_intr.c: broadcast interrupts ... When SMP is enabled, the kernel expects that interrupts be delivered to all CPUs in the system. Change the I/O APIC RTEs accordingly. Signed-off-by: Charles E. Youse <charles.youse@intel.com>		2019-10-07 19:46:55 -04:00
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CMakeLists.txt	…
Kconfig	interrupt: Convert RISC-V plic to use multi-level irq support	2019-09-10 07:34:57 -05:00
Kconfig.multilevel	…
Kconfig.multilevel.aggregator_template	…
Kconfig.rv32m1	…
Kconfig.s1000	…
Kconfig.sam0	…
Kconfig.shared_irq	…
Kconfig.stm32	…
arcv2_irq_unit.c	…
cavs_ictl.c	…
cavs_ictl.h	…
dw_ictl.c	drivers/interrupt_controller: dw_ictl: add get_line_state()	2019-09-07 10:20:51 -04:00
dw_ictl.h	…
exti_stm32.c	drivers: interrupt_controller: Add STM32G4X exti support	2019-10-04 18:44:24 -07:00
exti_stm32.h	…
gic-400.c	…
ioapic_intr.c	drivers/interrupt_controller/ioapic_intr.c: broadcast interrupts	2019-10-07 19:46:55 -04:00
ioapic_priv.h	…
loapic_intr.c	arch/x86: drivers/loapic_intr.c: move local APIC initialization	2019-10-07 19:46:55 -04:00
loapic_spurious.S	…
plic.c	interrupt: Convert RISC-V plic to use multi-level irq support	2019-09-10 07:34:57 -05:00
rv32m1_intmux.c	drivers/interrupt_controller: rv32m1_intmux: add get_line_state	2019-09-07 10:20:51 -04:00
sam0_eic.c	…
sam0_eic.h	…
sam0_eic_priv.h	…
shared_irq.c	…
system_apic.c	…
vexriscv_litex.c	…