Carlo Caione 5fece03d7d riscv: Introduce Zicsr and Zifencei extensions ... And enable the new extensions on all the SoCs. Signed-off-by: Carlo Caione <ccaione@baylibre.com>		2022-08-29 16:57:18 +02:00
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CMakeLists.txt	…
Kconfig.defconfig	…
Kconfig.soc	riscv: Introduce Zicsr and Zifencei extensions	2022-08-29 16:57:18 +02:00
linker.ld	…
soc.h	soc: riscv: remove unused RISCV_RAM_BASE|SIZE definitions	2022-07-28 20:51:31 +02:00