102 lines
2.1 KiB
Plaintext
102 lines
2.1 KiB
Plaintext
/*
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* Copyright (c) 2023 NXP
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include <xtensa/xtensa.dtsi>
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#include <mem.h>
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#include <zephyr/dt-bindings/clock/imx8ulp_clock.h>
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/ {
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cpus {
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#address-cells = <1>;
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#size-cells = <0>;
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cpu0: cpu@0 {
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device_type = "cpu";
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compatible = "cdns,tensilica-xtensa-lx7";
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reg = <0>;
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};
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#address-cells = <1>;
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#size-cells = <0>;
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clic: interrupt-controller@0 {
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compatible = "cdns,xtensa-core-intc";
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reg = <0>;
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interrupt-controller;
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#interrupt-cells = <3>;
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};
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};
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sram0: memory@8e000000 {
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device_type = "memory";
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compatible = "mmio-sram";
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reg = <0x8e000000 DT_SIZE_K(512)>;
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};
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sram1: memory@8e800000 {
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device_type = "memory";
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compatible = "mmio-sram";
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reg = <0x8e800000 DT_SIZE_K(512)>;
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};
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pcc4: clock-controller@29800000 {
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compatible = "nxp,kinetis-pcc";
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reg = <0x29800000 DT_SIZE_K(64)>;
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#clock-cells = <2>;
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};
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iomuxc1: pinctrl@298c0000 {
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compatible = "nxp,imx-iomuxc";
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reg = <0x298c0000 DT_SIZE_K(64)>;
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pinctrl: pinctrl {
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compatible = "nxp,imx8ulp-pinctrl";
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};
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};
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/* note: this was intentionally left without an interrupt
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* property because HIFI4 DSP doesn't receive interrupts
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* from LPUART7.
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*/
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lpuart7: serial@29870000 {
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compatible = "nxp,kinetis-lpuart";
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reg = <0x29870000 DT_SIZE_K(4)>;
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clocks = <&pcc4 IMX8ULP_CLOCK_LPUART7 0x0>;
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status = "disabled";
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};
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edma2: dma@2d800000 {
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compatible = "nxp,edma";
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reg = <0x2d800000 (DT_SIZE_K(64) * 32)>;
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valid-channels = <0>, <1>, <2>, <3>;
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interrupt-parent = <&clic>;
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interrupts = <6 0 0>, <7 0 0>, <8 0 0>, <9 0 0>;
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#dma-cells = <2>;
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status = "disabled";
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};
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sai5: dai@29890000 {
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compatible = "nxp,dai-sai";
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reg = <0x29890000 DT_SIZE_K(4)>;
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interrupt-parent = <&clic>;
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interrupts = <23 0 0>;
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dmas = <&edma2 2 70>, <&edma2 3 69>;
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dma-names = "tx", "rx";
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dai-index = <5>;
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status = "disabled";
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};
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sai6: dai@2da90000 {
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compatible = "nxp,dai-sai";
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reg = <0x2da90000 DT_SIZE_K(4)>;
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interrupt-parent = <&clic>;
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interrupts = <24 0 0>;
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dmas = <&edma2 0 72>, <&edma2 1 71>;
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dma-names = "tx", "rx";
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dai-index = <6>;
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status = "disabled";
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};
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};
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