490 lines
13 KiB
C
490 lines
13 KiB
C
/*
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* Copyright (c) 2019 Christian Taedcke <hacking@taedcke.com>
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#define DT_DRV_COMPAT silabs_gecko_spi_usart
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#define LOG_LEVEL CONFIG_SPI_LOG_LEVEL
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#include <zephyr/logging/log.h>
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LOG_MODULE_REGISTER(spi_gecko);
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#include "spi_context.h"
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#include <zephyr/sys/sys_io.h>
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#include <zephyr/device.h>
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#include <zephyr/drivers/spi.h>
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#include <zephyr/drivers/spi/rtio.h>
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#include <soc.h>
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#include "em_cmu.h"
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#include "em_usart.h"
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#include <stdbool.h>
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#ifdef CONFIG_PINCTRL
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#include <zephyr/drivers/pinctrl.h>
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#else
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#ifndef CONFIG_SOC_GECKO_HAS_INDIVIDUAL_PIN_LOCATION
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#error "Individual pin location support is required"
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#endif
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#endif /* CONFIG_PINCTRL */
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#ifdef CONFIG_CLOCK_CONTROL
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#include <zephyr/drivers/clock_control.h>
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#include <zephyr/drivers/clock_control/clock_control_silabs.h>
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#define GET_GECKO_USART_CLOCK(idx) \
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.clock_dev = DEVICE_DT_GET(DT_INST_CLOCKS_CTLR(idx)), \
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.clock_cfg = SILABS_DT_INST_CLOCK_CFG(idx),
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#elif DT_NODE_HAS_PROP(n, peripheral_id)
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#define CLOCK_USART(id) _CONCAT(cmuClock_USART, id)
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#define GET_GECKO_USART_CLOCK(n) \
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.clock = CLOCK_USART(DT_INST_PROP(n, peripheral_id)),
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#else
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#if (USART_COUNT == 1)
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#define CLOCK_USART(ref) (((ref) == USART0) ? cmuClock_USART0 \
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: -1)
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#elif (USART_COUNT == 2)
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#define CLOCK_USART(ref) (((ref) == USART0) ? cmuClock_USART0 \
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: ((ref) == USART1) ? cmuClock_USART1 \
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: -1)
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#elif (USART_COUNT == 3)
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#define CLOCK_USART(ref) (((ref) == USART0) ? cmuClock_USART0 \
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: ((ref) == USART1) ? cmuClock_USART1 \
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: ((ref) == USART2) ? cmuClock_USART2 \
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: -1)
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#elif (USART_COUNT == 4)
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#define CLOCK_USART(ref) (((ref) == USART0) ? cmuClock_USART0 \
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: ((ref) == USART1) ? cmuClock_USART1 \
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: ((ref) == USART2) ? cmuClock_USART2 \
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: ((ref) == USART3) ? cmuClock_USART3 \
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: -1)
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#elif (USART_COUNT == 5)
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#define CLOCK_USART(ref) (((ref) == USART0) ? cmuClock_USART0 \
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: ((ref) == USART1) ? cmuClock_USART1 \
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: ((ref) == USART2) ? cmuClock_USART2 \
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: ((ref) == USART3) ? cmuClock_USART3 \
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: ((ref) == USART4) ? cmuClock_USART4 \
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: -1)
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#elif (USART_COUNT == 6)
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#define CLOCK_USART(ref) (((ref) == USART0) ? cmuClock_USART0 \
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: ((ref) == USART1) ? cmuClock_USART1 \
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: ((ref) == USART2) ? cmuClock_USART2 \
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: ((ref) == USART3) ? cmuClock_USART3 \
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: ((ref) == USART4) ? cmuClock_USART4 \
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: ((ref) == USART5) ? cmuClock_USART5 \
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: -1)
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#else
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#error "Undefined number of USARTs."
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#endif /* USART_COUNT */
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#define GET_GECKO_USART_CLOCK(id) \
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.clock = CLOCK_USART((USART_TypeDef *)DT_INST_REG_ADDR(id)),
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#endif /* DT_NODE_HAS_PROP(n, peripheral_id) */
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#define SPI_WORD_SIZE 8
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/* Structure Declarations */
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struct spi_gecko_data {
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struct spi_context ctx;
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};
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struct spi_gecko_config {
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USART_TypeDef *base;
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#ifdef CONFIG_CLOCK_CONTROL
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const struct device *clock_dev;
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const struct silabs_clock_control_cmu_config clock_cfg;
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#else
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CMU_Clock_TypeDef clock;
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#endif
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uint32_t clock_frequency;
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#ifdef CONFIG_PINCTRL
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const struct pinctrl_dev_config *pcfg;
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#else
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struct soc_gpio_pin pin_rx;
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struct soc_gpio_pin pin_tx;
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struct soc_gpio_pin pin_clk;
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uint8_t loc_rx;
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uint8_t loc_tx;
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uint8_t loc_clk;
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#endif /* CONFIG_PINCTRL */
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};
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/* Helper Functions */
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static int spi_config(const struct device *dev,
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const struct spi_config *config,
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uint16_t *control)
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{
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const struct spi_gecko_config *gecko_config = dev->config;
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struct spi_gecko_data *data = dev->data;
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uint32_t spi_frequency;
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#ifdef CONFIG_CLOCK_CONTROL
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int err;
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err = clock_control_get_rate(gecko_config->clock_dev,
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(clock_control_subsys_t)&gecko_config->clock_cfg,
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&spi_frequency);
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if (err) {
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return err;
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}
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/* Max supported SPI frequency is half the source clock */
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spi_frequency /= 2;
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#else
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spi_frequency = CMU_ClockFreqGet(gecko_config->clock) / 2;
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#endif
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if (config->operation & SPI_HALF_DUPLEX) {
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LOG_ERR("Half-duplex not supported");
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return -ENOTSUP;
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}
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if (SPI_WORD_SIZE_GET(config->operation) != SPI_WORD_SIZE) {
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LOG_ERR("Word size must be %d", SPI_WORD_SIZE);
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return -ENOTSUP;
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}
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if (config->operation & SPI_CS_ACTIVE_HIGH) {
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LOG_ERR("CS active high not supported");
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return -ENOTSUP;
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}
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if (config->operation & SPI_LOCK_ON) {
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LOG_ERR("Lock On not supported");
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return -ENOTSUP;
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}
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if (IS_ENABLED(CONFIG_SPI_EXTENDED_MODES) &&
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(config->operation & SPI_LINES_MASK) != SPI_LINES_SINGLE) {
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LOG_ERR("Only supports single mode");
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return -ENOTSUP;
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}
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if (config->operation & SPI_TRANSFER_LSB) {
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LOG_ERR("LSB first not supported");
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return -ENOTSUP;
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}
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if (config->operation & SPI_OP_MODE_SLAVE) {
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LOG_ERR("Slave mode not supported");
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return -ENOTSUP;
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}
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/* Set frequency to the minimum of what the device supports, what the
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* user has configured the controller to, and the max frequency for the
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* transaction.
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*/
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if (gecko_config->clock_frequency > spi_frequency) {
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LOG_ERR("SPI clock-frequency too high");
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return -EINVAL;
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}
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spi_frequency = MIN(gecko_config->clock_frequency, spi_frequency);
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if (config->frequency) {
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spi_frequency = MIN(config->frequency, spi_frequency);
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}
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USART_BaudrateSyncSet(gecko_config->base, 0, spi_frequency);
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/* Set Loopback */
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if (config->operation & SPI_MODE_LOOP) {
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gecko_config->base->CTRL |= USART_CTRL_LOOPBK;
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} else {
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gecko_config->base->CTRL &= ~USART_CTRL_LOOPBK;
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}
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/* Set CPOL */
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if (config->operation & SPI_MODE_CPOL) {
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gecko_config->base->CTRL |= USART_CTRL_CLKPOL;
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} else {
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gecko_config->base->CTRL &= ~USART_CTRL_CLKPOL;
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}
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/* Set CPHA */
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if (config->operation & SPI_MODE_CPHA) {
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gecko_config->base->CTRL |= USART_CTRL_CLKPHA;
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} else {
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gecko_config->base->CTRL &= ~USART_CTRL_CLKPHA;
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}
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/* Set word size */
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gecko_config->base->FRAME = usartDatabits8
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| USART_FRAME_STOPBITS_DEFAULT
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| USART_FRAME_PARITY_DEFAULT;
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/* At this point, it's mandatory to set this on the context! */
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data->ctx.config = config;
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return 0;
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}
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static void spi_gecko_send(USART_TypeDef *usart, uint8_t frame)
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{
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/* Write frame to register */
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USART_Tx(usart, frame);
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/* Wait until the transfer ends */
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while (!(usart->STATUS & USART_STATUS_TXC)) {
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}
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}
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static uint8_t spi_gecko_recv(USART_TypeDef *usart)
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{
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/* Return data inside rx register */
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return (uint8_t)usart->RXDATA;
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}
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static bool spi_gecko_transfer_ongoing(struct spi_gecko_data *data)
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{
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return spi_context_tx_on(&data->ctx) || spi_context_rx_on(&data->ctx);
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}
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static inline uint8_t spi_gecko_next_tx(struct spi_gecko_data *data)
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{
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uint8_t tx_frame = 0;
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if (spi_context_tx_buf_on(&data->ctx)) {
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tx_frame = UNALIGNED_GET((uint8_t *)(data->ctx.tx_buf));
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}
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return tx_frame;
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}
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static int spi_gecko_shift_frames(USART_TypeDef *usart,
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struct spi_gecko_data *data)
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{
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uint8_t tx_frame;
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uint8_t rx_frame;
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tx_frame = spi_gecko_next_tx(data);
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spi_gecko_send(usart, tx_frame);
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spi_context_update_tx(&data->ctx, 1, 1);
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rx_frame = spi_gecko_recv(usart);
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if (spi_context_rx_buf_on(&data->ctx)) {
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UNALIGNED_PUT(rx_frame, (uint8_t *)data->ctx.rx_buf);
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}
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spi_context_update_rx(&data->ctx, 1, 1);
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return 0;
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}
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static void spi_gecko_xfer(const struct device *dev,
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const struct spi_config *config)
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{
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int ret;
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struct spi_gecko_data *data = dev->data;
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struct spi_context *ctx = &data->ctx;
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const struct spi_gecko_config *gecko_config = dev->config;
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spi_context_cs_control(ctx, true);
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do {
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ret = spi_gecko_shift_frames(gecko_config->base, data);
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} while (!ret && spi_gecko_transfer_ongoing(data));
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spi_context_cs_control(ctx, false);
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spi_context_complete(ctx, dev, 0);
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}
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#ifndef CONFIG_PINCTRL
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static void spi_gecko_init_pins(const struct device *dev)
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{
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const struct spi_gecko_config *config = dev->config;
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GPIO_PinModeSet(config->pin_rx.port, config->pin_rx.pin,
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config->pin_rx.mode, config->pin_rx.out);
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GPIO_PinModeSet(config->pin_tx.port, config->pin_tx.pin,
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config->pin_tx.mode, config->pin_tx.out);
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GPIO_PinModeSet(config->pin_clk.port, config->pin_clk.pin,
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config->pin_clk.mode, config->pin_clk.out);
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/* disable all pins while configuring */
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config->base->ROUTEPEN = 0;
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config->base->ROUTELOC0 =
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(config->loc_tx << _USART_ROUTELOC0_TXLOC_SHIFT) |
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(config->loc_rx << _USART_ROUTELOC0_RXLOC_SHIFT) |
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(config->loc_clk << _USART_ROUTELOC0_CLKLOC_SHIFT);
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config->base->ROUTELOC1 = _USART_ROUTELOC1_RESETVALUE;
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config->base->ROUTEPEN = USART_ROUTEPEN_RXPEN | USART_ROUTEPEN_TXPEN |
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USART_ROUTEPEN_CLKPEN;
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}
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#endif /* !CONFIG_PINCTRL */
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/* API Functions */
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static int spi_gecko_init(const struct device *dev)
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{
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int err;
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const struct spi_gecko_config *config = dev->config;
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struct spi_gecko_data *data = dev->data;
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USART_InitSync_TypeDef usartInit = USART_INITSYNC_DEFAULT;
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/* The peripheral and gpio clock are already enabled from soc and gpio
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* driver
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*/
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usartInit.enable = usartDisable;
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usartInit.baudrate = 1000000;
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usartInit.databits = usartDatabits8;
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usartInit.master = 1;
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usartInit.msbf = 1;
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usartInit.clockMode = usartClockMode0;
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#if defined(USART_INPUT_RXPRS) && defined(USART_TRIGCTRL_AUTOTXTEN)
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usartInit.prsRxEnable = 0;
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usartInit.prsRxCh = 0;
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usartInit.autoTx = 0;
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#endif
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/* Enable USART clock */
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#ifdef CONFIG_CLOCK_CONTROL
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err = clock_control_on(config->clock_dev, (clock_control_subsys_t)&config->clock_cfg);
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if (err < 0) {
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return err;
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}
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#else
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CMU_ClockEnable(config->clock, true);
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#endif
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/* Init USART */
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USART_InitSync(config->base, &usartInit);
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#ifdef CONFIG_PINCTRL
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err = pinctrl_apply_state(config->pcfg, PINCTRL_STATE_DEFAULT);
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if (err < 0) {
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return err;
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}
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#else
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/* Initialize USART pins */
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spi_gecko_init_pins(dev);
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#endif /* CONFIG_PINCTRL */
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err = spi_context_cs_configure_all(&data->ctx);
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if (err < 0) {
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return err;
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}
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/* Enable the peripheral */
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config->base->CMD = (uint32_t) usartEnable;
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return 0;
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}
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static int spi_gecko_transceive(const struct device *dev,
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const struct spi_config *config,
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const struct spi_buf_set *tx_bufs,
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const struct spi_buf_set *rx_bufs)
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{
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struct spi_gecko_data *data = dev->data;
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uint16_t control = 0;
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int ret;
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ret = spi_config(dev, config, &control);
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if (ret < 0) {
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return ret;
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}
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spi_context_buffers_setup(&data->ctx, tx_bufs, rx_bufs, 1);
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spi_gecko_xfer(dev, config);
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return 0;
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}
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#ifdef CONFIG_SPI_ASYNC
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static int spi_gecko_transceive_async(const struct device *dev,
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const struct spi_config *config,
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const struct spi_buf_set *tx_bufs,
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const struct spi_buf_set *rx_bufs,
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struct k_poll_signal *async)
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{
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return -ENOTSUP;
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}
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#endif /* CONFIG_SPI_ASYNC */
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static int spi_gecko_release(const struct device *dev,
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const struct spi_config *config)
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{
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const struct spi_gecko_config *gecko_config = dev->config;
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if (!(gecko_config->base->STATUS & USART_STATUS_TXIDLE)) {
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return -EBUSY;
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}
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return 0;
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}
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/* Device Instantiation */
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static const struct spi_driver_api spi_gecko_api = {
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.transceive = spi_gecko_transceive,
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#ifdef CONFIG_SPI_ASYNC
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.transceive_async = spi_gecko_transceive_async,
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#endif /* CONFIG_SPI_ASYNC */
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#ifdef CONFIG_SPI_RTIO
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.iodev_submit = spi_rtio_iodev_default_submit,
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#endif
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.release = spi_gecko_release,
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};
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#ifdef CONFIG_PINCTRL
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#define SPI_INIT(n) \
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PINCTRL_DT_INST_DEFINE(n); \
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static struct spi_gecko_data spi_gecko_data_##n = { \
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SPI_CONTEXT_INIT_LOCK(spi_gecko_data_##n, ctx), \
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SPI_CONTEXT_INIT_SYNC(spi_gecko_data_##n, ctx), \
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SPI_CONTEXT_CS_GPIOS_INITIALIZE(DT_DRV_INST(n), ctx) \
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}; \
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static struct spi_gecko_config spi_gecko_cfg_##n = { \
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.pcfg = PINCTRL_DT_INST_DEV_CONFIG_GET(n), \
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.base = (USART_TypeDef *) \
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DT_INST_REG_ADDR(n), \
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GET_GECKO_USART_CLOCK(n) \
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.clock_frequency = DT_INST_PROP_OR(n, clock_frequency, 1000000) \
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}; \
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DEVICE_DT_INST_DEFINE(n, \
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spi_gecko_init, \
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NULL, \
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&spi_gecko_data_##n, \
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&spi_gecko_cfg_##n, \
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POST_KERNEL, \
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CONFIG_SPI_INIT_PRIORITY, \
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&spi_gecko_api);
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#else
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#define SPI_INIT(n) \
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static struct spi_gecko_data spi_gecko_data_##n = { \
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SPI_CONTEXT_INIT_LOCK(spi_gecko_data_##n, ctx), \
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SPI_CONTEXT_INIT_SYNC(spi_gecko_data_##n, ctx), \
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SPI_CONTEXT_CS_GPIOS_INITIALIZE(DT_DRV_INST(n), ctx) \
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}; \
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static struct spi_gecko_config spi_gecko_cfg_##n = { \
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.base = (USART_TypeDef *) \
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DT_INST_REG_ADDR(n), \
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GET_GECKO_USART_CLOCK(n) \
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.clock_frequency = DT_INST_PROP_OR(n, clock_frequency, 1000000), \
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.pin_rx = { DT_INST_PROP_BY_IDX(n, location_rx, 1), \
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DT_INST_PROP_BY_IDX(n, location_rx, 2), \
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gpioModeInput, 1}, \
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.pin_tx = { DT_INST_PROP_BY_IDX(n, location_tx, 1), \
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DT_INST_PROP_BY_IDX(n, location_tx, 2), \
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gpioModePushPull, 1}, \
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.pin_clk = { DT_INST_PROP_BY_IDX(n, location_clk, 1), \
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DT_INST_PROP_BY_IDX(n, location_clk, 2), \
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gpioModePushPull, 1}, \
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.loc_rx = DT_INST_PROP_BY_IDX(n, location_rx, 0), \
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.loc_tx = DT_INST_PROP_BY_IDX(n, location_tx, 0), \
|
|
.loc_clk = DT_INST_PROP_BY_IDX(n, location_clk, 0), \
|
|
}; \
|
|
DEVICE_DT_INST_DEFINE(n, \
|
|
spi_gecko_init, \
|
|
NULL, \
|
|
&spi_gecko_data_##n, \
|
|
&spi_gecko_cfg_##n, \
|
|
POST_KERNEL, \
|
|
CONFIG_SPI_INIT_PRIORITY, \
|
|
&spi_gecko_api);
|
|
#endif /* CONFIG_PINCTRL */
|
|
|
|
DT_INST_FOREACH_STATUS_OKAY(SPI_INIT)
|