zephyr/dts/bindings/flash_controller/st,stm32-qspi-nor.yaml

52 lines
1.4 KiB
YAML

# Copyright (c) 2020, Linaro limited
# SPDX-License-Identifier: Apache-2.0
description: |
STM32 QSPI Flash controller supporting the JEDEC CFI interface
Representation of a serial flash on a quadspi bus:
mx25r6435f: qspi-nor-flash@0 {
compatible = "st,stm32-qspi-nor";
label = "MX25R6435F";
reg = <0>;
qspi-max-frequency = <80000000>;
size = <0x4000000>;
reset-gpios = <&gpiod 3 GPIO_ACTIVE_LOW>;
reset-gpios-duration = <1>;
spi-bus-width = <4>;
status = "okay";
};
compatible: "st,stm32-qspi-nor"
include: ["flash-controller.yaml", "jedec,jesd216.yaml"]
on-bus: qspi
properties:
reg:
required: true
qspi-max-frequency:
type: int
required: true
description: Maximum clock frequency of device's QSPI interface in Hz
label:
required: true
size:
required: true
description: Flash Memory size in bits
reset-gpios:
type: phandle-array
required: false
description: RESETn pin
reset-gpios-duration:
type: int
required: false
description: The duration (in ms) for the flash memory reset pulse
spi-bus-width:
type: int
required: false
description: The width of (Q)SPI bus to which flash memory is connected.
Now only value of 4 (when using SIO[0123]) is supported.