80 lines
1.6 KiB
YAML
80 lines
1.6 KiB
YAML
description: Xilinx AXI GPIO IP node
|
|
|
|
compatible: "xlnx,xps-gpio-1.00.a"
|
|
|
|
include: [gpio-controller.yaml, base.yaml]
|
|
|
|
bus: xlnx,xps-gpio-1.00.a
|
|
|
|
# Property names correspond to a subset of those generated by
|
|
# https://github.com/Xilinx/device-tree-xlnx
|
|
|
|
properties:
|
|
reg:
|
|
required: true
|
|
|
|
label:
|
|
required: true
|
|
|
|
xlnx,all-inputs:
|
|
type: int
|
|
description: |
|
|
1 if all GPIOs are inputs, 0 otherwise
|
|
|
|
xlnx,all-outputs:
|
|
type: int
|
|
description: |
|
|
1 if all GPIOs are outputs, 0 otherwise
|
|
|
|
xlnx,dout-default:
|
|
type: int
|
|
description: |
|
|
Default output value. If n-th bit is 1, GPIO-n default value is 1.
|
|
|
|
xlnx,gpio-width:
|
|
type: int
|
|
description: |
|
|
Number of GPIOs supported
|
|
|
|
xlnx,tri-default:
|
|
type: int
|
|
description: |
|
|
Default tristate register value. If n-th bit is 1, GPIO-n is an input.
|
|
|
|
xlnx,is-dual:
|
|
type: int
|
|
description: |
|
|
1 if controller has GPIO2 enabled, 0 otherwise
|
|
|
|
xlnx,all-inputs-2:
|
|
type: int
|
|
description: |
|
|
1 if all GPIO2s are inputs, 0 otherwise
|
|
|
|
xlnx,all-outputs-2:
|
|
type: int
|
|
description: |
|
|
1 if all GPIO2s are outputs, 0 otherwise
|
|
|
|
xlnx,dout-default-2:
|
|
type: int
|
|
description: |
|
|
Default output value. If n-th bit is 1, GPIO2-n default value is 1.
|
|
|
|
xlnx,gpio2-width:
|
|
type: int
|
|
description: |
|
|
Number of GPIO2s supported
|
|
|
|
xlnx,tri-default-2:
|
|
type: int
|
|
description: |
|
|
Default tristate register value. If n-th bit is 1, GPIO2-n is an input.
|
|
|
|
"#gpio-cells":
|
|
const: 2
|
|
|
|
gpio-cells:
|
|
- pin
|
|
- flags
|