34 lines
1.3 KiB
YAML
34 lines
1.3 KiB
YAML
# Copyright (C) 2020 Linaro
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# SPDX-License-Identifier: Apache-2.0
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description: |
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GPIO pins exposed on Mikro BUS headers.
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The Mikro BUS layout provides two headers, aligned on the opposite
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edges of the board.
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Documentation:
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* https://www.mikroe.com/mikrobus
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* https://download.mikroe.com/documents/standards/mikrobus/mikrobus-standard-specification-v200.pdf
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This binding provides a nexus mapping for 10 pins, left side pins are
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numbered 0 - 5 (AN - MOSI), the right side pins are numbered 6 - 10
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(PWM - SDA). The bottom 2 pins on each side are used for input voltage
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and ground, they are not mapped in the nexus.
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Analog - AN PWM - PWM output
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Reset - RST INT - Hardware Interrupt
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SPI Chip Select - CS RX - UART Receive
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SPI Clock - SCK TX - UART Transmit
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SPI Master Input Slave Output - MISO SCL - I2C Clock
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SPI Master Output Slave Input - MOSI SDA - I2C Data
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VCC-3.3V power - +3.3V +5V - VCC-5V power
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Reference Ground - GND GND - Reference Ground
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Board's silkscreen may vary depending you board, but coherent with
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the description above as it's according to the standard's specification.
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compatible: "mikro-bus"
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include: [gpio-nexus.yaml, base.yaml]
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