46 lines
1.6 KiB
YAML
46 lines
1.6 KiB
YAML
# Copyright (C) 2020 Gerson Fernando Budke <nandojve@gmail.com>
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# SPDX-License-Identifier: Apache-2.0
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description: |
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GPIO pins exposed on Atmel Xplained headers.
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The Xplained layout provide a standard 10 pin header. A board can have
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one or more headers and can share pins. This connector was developed to
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match with Atmel AVR XMEGA devices GPIO port plus power signals. The Atmel
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Xplained Pro standard connector keep compatibility with this header and it
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can be defined on every board with an Xplained Pro Connector extension and
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every pin can be defined as general purpose GPIO.
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The AVR XMEGA port was designed as:
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Signal Main Function
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Px0 SDA
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Px1 SCL
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Px2 RX
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Px3 TX
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Px4 SS
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Px5 MOSI
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Px6 MISO
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Px7 SCK
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GND
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VDD
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Documentation:
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* https://www.microchip.com/development-tools/xplained-boards
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* http://ww1.microchip.com/downloads/en/DeviceDoc/Atmel-42091-Atmel-Xplained-Pro-Hardware-Development-Kit_User%20Guide.pdf
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This binding provides a nexus mapping for 10 pins where pins are disposed
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to have a even and odd column:
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Connector
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Bind Pin Name Pin Pin Pin Name Bind
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0 I2C(SDA) 1 2 I2C(SCL) 1
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2 UART(RX) 3 4 UART(TX) 3
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4 SPI(CS0) 5 6 SPI(MOSI) 5
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6 SPI(MISO) 7 8 SPI(SCK) 7
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GND 9 10 VDD(+3.3V)
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compatible: "atmel-xplained-header"
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include: [gpio-nexus.yaml, base.yaml]
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