68 lines
1.2 KiB
Plaintext
68 lines
1.2 KiB
Plaintext
/*
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* Copyright (c) 2020 Antmicro <www.antmicro.com>
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include <mem.h>
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#include <arm/armv7-m.dtsi>
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#include <dt-bindings/gpio/gpio.h>
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/ {
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cpus {
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#address-cells = <1>;
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#size-cells = <0>;
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cpu0: cpu@0 {
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device_type = "cpu";
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compatible = "arm,cortex-m4f";
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reg = <0>;
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#address-cells = <1>;
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#size-cells = <1>;
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mpu: mpu@e000ed90 {
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compatible = "arm,armv7m-mpu";
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reg = <0xe000ed90 0x40>;
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arm,num-mpu-regions = <8>;
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};
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};
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};
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sram0: memory@20000000 {
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compatible = "mmio-sram";
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reg = <0x20000000 DT_SIZE_K(512)>;
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};
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uartclk: uart-clock {
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compatible = "fixed-clock";
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clock-frequency = <5120000>;
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#clock-cells = <0>;
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};
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soc {
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uart0: uart@40010000 {
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compatible = "arm,pl011";
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reg = <0x40010000 DT_SIZE_K(4)>;
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clocks = <&uartclk>;
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interrupts = <7 3>;
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interrupt-names = "rx";
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label = "UART_0";
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};
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gpio: gpio {
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compatible = "quicklogic,eos-s3-gpio";
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status = "disabled";
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interrupts = <5 2>;
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#gpio-cells = <2>;
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ngpios = <8>;
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pin-secondary-config = <0x00>;
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gpio-controller;
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label = "GPIO";
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};
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};
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};
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&nvic {
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arm,num-irq-priority-bits = <3>;
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};
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