52 lines
1.5 KiB
YAML
52 lines
1.5 KiB
YAML
# Copyright (c) 2020, Teslabs Engineering S.L.
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# SPDX-License-Identifier: Apache-2.0
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description: |
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STM32 Flexible Memory Controller (FMC).
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The FMC allows to interface with static-memory mapped external devices such as
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SRAM, NOR Flash, NAND Flash, SDRAM...
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All external memories share the addresses, data and control signals with the
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controller. Each external device is accessed by means of a unique chip select.
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The FMC performs only one access at a time to an external device.
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The flexible memory controller includes three memory controllers:
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- NOR/PSRAM memory controller
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- NAND memory controller (some devices also support PC Card)
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- Synchronous DRAM (SDRAM/Mobile LPSDR SDRAM) controller
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Each memory controller is defined below the FMC DeviceTree node and is managed
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by a separate Zephyr device. However, because signals are shared the FMC
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device handles the signals and the peripheral clocks. FMC can be enabled
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in your board DeviceTree file like this:
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&fmc {
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status = "okay";
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pinctrl-0 = <&fmc_nbl0_pe0 &fmc_nbl1_pe1 &fmc_nbl2_pi4...>;
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};
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compatible: "st,stm32-fmc"
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include: base.yaml
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properties:
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reg:
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required: true
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label:
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required: true
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clocks:
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required: true
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pinctrl-0:
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type: phandles
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required: false
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description: |
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GPIO pin configuration for FMC signals. We expect that the phandles
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will reference pinctrl nodes, e.g.
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pinctrl-0 = <&fmc_a0_pf0 &fmc_a1_pf1...>;
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