162 lines
3.9 KiB
C
162 lines
3.9 KiB
C
/*
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* Copyright (c) 2018, Christian Taedcke
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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/**
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* @file
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* @brief Common SoC initialization for the EXX32
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*/
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#include <kernel.h>
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#include <init.h>
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#include <soc.h>
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#include <em_cmu.h>
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#include <em_emu.h>
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#include <em_chip.h>
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#include <arch/cpu.h>
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#include <arch/arm/cortex_m/cmsis.h>
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#include <logging/log.h>
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LOG_MODULE_REGISTER(soc, CONFIG_SOC_LOG_LEVEL);
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#ifdef CONFIG_CMU_HFCLK_HFXO
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/**
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* @brief Initialization parameters for the external high frequency oscillator
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*/
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static const CMU_HFXOInit_TypeDef hfxoInit = CMU_HFXOINIT_DEFAULT;
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#elif (defined CONFIG_CMU_HFCLK_LFXO)
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/**
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* @brief Initialization parameters for the external low frequency oscillator
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*/
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static const CMU_LFXOInit_TypeDef lfxoInit = CMU_LFXOINIT_DEFAULT;
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#endif
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/**
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* @brief Initialize the system clock
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*
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* @return N/A
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*
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*/
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static ALWAYS_INLINE void clock_init(void)
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{
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#ifdef CONFIG_CMU_HFCLK_HFXO
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if (CMU_ClockSelectGet(cmuClock_HF) != cmuSelect_HFXO) {
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CMU_HFXOInit(&hfxoInit);
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CMU_OscillatorEnable(cmuOsc_HFXO, true, true);
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CMU_ClockSelectSet(cmuClock_HF, cmuSelect_HFXO);
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}
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SystemHFXOClockSet(CONFIG_CMU_HFXO_FREQ);
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CMU_OscillatorEnable(cmuOsc_HFRCO, false, false);
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#elif (defined CONFIG_CMU_HFCLK_LFXO)
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if (CMU_ClockSelectGet(cmuClock_HF) != cmuSelect_LFXO) {
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CMU_LFXOInit(&lfxoInit);
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CMU_OscillatorEnable(cmuOsc_LFXO, true, true);
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CMU_ClockSelectSet(cmuClock_HF, cmuSelect_LFXO);
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}
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SystemLFXOClockSet(CONFIG_CMU_LFXO_FREQ);
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CMU_OscillatorEnable(cmuOsc_HFRCO, false, false);
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#elif (defined CONFIG_CMU_HFCLK_HFRCO)
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/*
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* This is the default clock, the controller starts with, so nothing to
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* do here.
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*/
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#else
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#error "Unsupported clock source for HFCLK selected"
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#endif
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/* Enable the High Frequency Peripheral Clock */
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CMU_ClockEnable(cmuClock_HFPER, true);
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#if defined(CONFIG_GPIO_GECKO) || defined(CONFIG_LOG_BACKEND_SWO)
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CMU_ClockEnable(cmuClock_GPIO, true);
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#endif
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}
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#ifdef CONFIG_SOC_GECKO_EMU_DCDC
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static ALWAYS_INLINE void dcdc_init(void)
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{
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#if defined(CONFIG_SOC_GECKO_EMU_DCDC_MODE_UNCONFIGURED)
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/* Nothing to do, leave DC/DC converter in unconfigured, safe state. */
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#elif defined(CONFIG_SOC_GECKO_EMU_DCDC_MODE_ON) || defined(CONFIG_SOC_GECKO_EMU_DCDC_MODE_BYPASS)
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EMU_DCDCInit_TypeDef init_cfg = EMU_DCDCINIT_DEFAULT;
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#if defined(CONFIG_SOC_GECKO_EMU_DCDC_MODE_BYPASS)
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init_cfg.dcdcMode = emuDcdcMode_Bypass;
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#endif
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EMU_DCDCInit(&init_cfg);
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#elif defined(CONFIG_SOC_GECKO_EMU_DCDC_MODE_OFF)
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EMU_DCDCPowerOff();
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#else
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#error "Unsupported power configuration mode of the on chip DC/DC converter."
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#endif
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}
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#endif
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#ifdef CONFIG_LOG_BACKEND_SWO
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static void swo_init(void)
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{
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struct soc_gpio_pin pin_swo = PIN_SWO;
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/* Select HFCLK as the debug trace clock */
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CMU->DBGCLKSEL = CMU_DBGCLKSEL_DBG_HFCLK;
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#if defined(_GPIO_ROUTEPEN_MASK)
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/* Enable Serial wire output pin */
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GPIO->ROUTEPEN |= GPIO_ROUTEPEN_SWVPEN;
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/* Set SWO location */
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GPIO->ROUTELOC0 =
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DT_GPIO_GECKO_SWO_LOCATION << _GPIO_ROUTELOC0_SWVLOC_SHIFT;
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#else
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GPIO->ROUTE = GPIO_ROUTE_SWOPEN | (DT_GPIO_GECKO_SWO_LOCATION << 8);
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#endif
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soc_gpio_configure(&pin_swo);
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}
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#endif /* CONFIG_LOG_BACKEND_SWO */
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/**
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* @brief Perform basic hardware initialization
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*
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* Initialize the interrupt controller device drivers.
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* Also initialize the timer device driver, if required.
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*
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* @return 0
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*/
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static int silabs_exx32_init(struct device *arg)
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{
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ARG_UNUSED(arg);
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unsigned int oldLevel; /* old interrupt lock level */
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/* disable interrupts */
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oldLevel = irq_lock();
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/* handle chip errata */
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CHIP_Init();
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#ifdef CONFIG_SOC_GECKO_EMU_DCDC
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dcdc_init();
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#endif
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/* Initialize system clock according to CONFIG_CMU settings */
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clock_init();
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/*
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* install default handler that simply resets the CPU
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* if configured in the kernel, NOP otherwise
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*/
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NMI_INIT();
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#ifdef CONFIG_LOG_BACKEND_SWO
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/* Configure SWO debug output */
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swo_init();
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#endif
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/* restore interrupt state */
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irq_unlock(oldLevel);
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return 0;
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}
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SYS_INIT(silabs_exx32_init, PRE_KERNEL_1, 0);
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