95 lines
2.4 KiB
C
95 lines
2.4 KiB
C
/*
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* Copyright (c) 2023 TOKITA Hiroshi <tokita.hiroshi@fujitsu.com>
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#ifndef ZEPHYR_SOC_ARM_RENESAS_RA_COMMON_RA_PINCTRL_SOC_H_
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#define ZEPHYR_SOC_ARM_RENESAS_RA_COMMON_RA_PINCTRL_SOC_H_
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enum {
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PmnPFS_PODR_POS,
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PmnPFS_PIDR_POS,
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PmnPFS_PDR_POS,
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PmnPFS_RSV3_POS,
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PmnPFS_PCR_POS,
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PmnPFS_RSV5_POS,
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PmnPFS_NCODR_POS,
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PmnPFS_RSV7_POS,
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PmnPFS_RSV8_POS,
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PmnPFS_RSV9_POS,
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PmnPFS_DSCR_POS,
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PmnPFS_DSCR1_POS,
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PmnPFS_EOR_POS,
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PmnPFS_EOF_POS,
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PmnPFS_ISEL_POS,
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PmnPFS_ASEL_POS,
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PmnPFS_PMR_POS,
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};
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struct pinctrl_ra_pin {
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union {
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uint32_t config;
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struct {
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uint8_t PODR: 1;
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uint8_t PIDR: 1;
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uint8_t PDR: 1;
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uint8_t RESERVED3: 1;
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uint8_t PCR: 1;
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uint8_t RESERVED5: 1;
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uint8_t NCODR: 1;
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uint8_t RESERVED7: 1;
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uint8_t RESERVED8: 1;
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uint8_t RESERVED9: 1;
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uint8_t DSCR: 2;
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uint8_t EOFR: 2;
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uint8_t ISEL: 1;
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uint8_t ASEL: 1;
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uint8_t PMR: 1;
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uint8_t RESERVED17: 7;
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uint8_t PSEL: 5;
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uint8_t RESERVED29: 3;
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};
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/* Using RESERVED fields for store pin and port info. */
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struct {
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uint32_t UNUSED0: 17;
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uint8_t pin: 4;
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uint8_t port: 3;
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uint32_t UNUSED24: 5;
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uint8_t port4: 1;
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uint32_t UNUSED30: 2;
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};
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};
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};
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typedef struct pinctrl_ra_pin pinctrl_soc_pin_t;
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extern int pinctrl_ra_query_config(uint32_t port, uint32_t pin,
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struct pinctrl_ra_pin *const pincfg);
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/**
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* @brief Utility macro to initialize each pin.
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*
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* @param node_id Node identifier.
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* @param prop Property name.
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* @param idx Property entry index.
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*/
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#define Z_PINCTRL_STATE_PIN_INIT(node_id, prop, idx) \
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{ \
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.config = DT_PROP_BY_IDX(node_id, prop, idx), \
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},
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/**
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* @brief Utility macro to initialize state pins contained in a given property.
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*
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* @param node_id Node identifier.
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* @param prop Property name describing state pins.
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*/
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#define Z_PINCTRL_STATE_PINS_INIT(node_id, prop) \
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{ \
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DT_FOREACH_CHILD_VARGS(DT_PHANDLE(node_id, prop), DT_FOREACH_PROP_ELEM, pinmux, \
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Z_PINCTRL_STATE_PIN_INIT) \
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}
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#endif /* ZEPHYR_SOC_ARM_RENESAS_RA_COMMON_RA_PINCTRL_SOC_H_ */
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