107 lines
3.7 KiB
C
107 lines
3.7 KiB
C
/*
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* Copyright (c) 2017 Intel Corporation
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* Copyright (c) 2018 PHYTEC Messtechnik GmbH
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#ifndef ZEPHYR_DRIVERS_SENSOR_APDS9253_APDS9253_H_
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#define ZEPHYR_DRIVERS_SENSOR_APDS9253_APDS9253_H_
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#include <zephyr/drivers/gpio.h>
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#define APDS9253_MAIN_CTRL_REG 0x00
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#define APDS9253_MAIN_CTRL_REG_MASK GENMASK(5, 0)
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#define APDS9253_MAIN_CTRL_SAI_LS BIT(5)
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#define APDS9253_MAIN_CTRL_SW_RESET BIT(4)
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#define APDS9253_MAIN_CTRL_RGB_MODE BIT(2)
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#define APDS9253_MAIN_CTRL_LS_EN BIT(1)
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#define APDS9253_LS_MEAS_RATE_REG 0x04
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#define APDS9253_LS_MEAS_RATE_RES_MASK GENMASK(6, 4)
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#define APDS9253_LS_MEAS_RATE_RES_20BIT_400MS 0
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#define APDS9253_LS_MEAS_RATE_RES_19BIT_200MS BIT(4)
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#define APDS9253_LS_MEAS_RATE_RES_18BIT_100MS BIT(5) /* default */
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#define APDS9253_LS_MEAS_RATE_RES_17BIT_50MS (BIT(5) | BIT(4))
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#define APDS9253_LS_MEAS_RATE_RES_16BIT_25MS BIT(6)
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#define APDS9253_LS_MEAS_RATE_RES_13_3MS (BIT(6) | BIT(4))
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#define APDS9253_LS_MEAS_RATE_MES_MASK GENMASK(2, 0)
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#define APDS9253_LS_MEAS_RATE_MES_2000MS (BIT(2) | BIT(1) | BIT(0))
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#define APDS9253_LS_MEAS_RATE_MES_1000MS (BIT(2) | BIT(0))
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#define APDS9253_LS_MEAS_RATE_MES_500MS BIT(2)
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#define APDS9253_LS_MEAS_RATE_MES_200MS (BIT(1) | BIT(0))
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#define APDS9253_LS_MEAS_RATE_MES_100MS BIT(1) /* default */
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#define APDS9253_LS_MEAS_RATE_MES_50MS BIT(0)
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#define APDS9253_LS_MEAS_RATE_MES_25MS 0
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#define APDS9253_LS_GAIN_REG 0x05
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#define APDS9253_LS_GAIN_MASK GENMASK(2, 0)
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#define APDS9253_LS_GAIN_RANGE_18 BIT(2)
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#define APDS9253_LS_GAIN_RANGE_9 (BIT(1) | BIT(0))
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#define APDS9253_LS_GAIN_RANGE_6 BIT(1)
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#define APDS9253_LS_GAIN_RANGE_3 BIT(0) /* default */
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#define APDS9253_LS_GAIN_RANGE_1 0
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#define APDS9253_PART_ID 0x06
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#define APDS9253_DEVICE_PART_ID 0xC0
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#define APDS9253_PART_ID_REV_MASK GENMASK(3, 0)
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#define APDS9253_PART_ID_ID_MASK GENMASK(7, 4)
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#define APDS9253_MAIN_STATUS_REG 0x07
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#define APDS9253_MAIN_STATUS_POWER_ON BIT(5)
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#define APDS9253_MAIN_STATUS_LS_INTERRUPT BIT(4)
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#define APDS9253_MAIN_STATUS_LS_STATUS BIT(3)
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/* Channels data */
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#define APDS9253_LS_DATA_BASE 0x0A
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#define APDS9253_LS_DATA_IR_0 0x0A
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#define APDS9253_LS_DATA_IR_1 0x0B
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#define APDS9253_LS_DATA_IR_2 0x0C
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#define APDS9253_LS_DATA_GREEN_0 0x0D
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#define APDS9253_LS_DATA_GREEN_1 0x0E
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#define APDS9253_LS_DATA_GREEN_2 0x0F
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#define APDS9253_LS_DATA_BLUE_0 0x10
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#define APDS9253_LS_DATA_BLUE_1 0x11
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#define APDS9253_LS_DATA_BLUE_2 0x12
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#define APDS9253_LS_DATA_RED_0 0x13
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#define APDS9253_LS_DATA_RED_1 0x14
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#define APDS9253_LS_DATA_RED_2 0x15
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#define APDS9253_INT_CFG 0x19
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#define APDS9253_INT_CFG_LS_INT_SEL_IR 0
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#define APDS9253_INT_CFG_LS_INT_SEL_ALS BIT(4) /* default */
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#define APDS9253_INT_CFG_LS_INT_SEL_RED BIT(5)
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#define APDS9253_INT_CFG_LS_INT_SEL_BLUE (BIT(5) | BIT(4))
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#define APDS9253_INT_CFG_LS_VAR_MODE_EN BIT(3)
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#define APDS9253_INT_CFG_LS_INT_MODE_EN BIT(3)
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#define APDS9253_INT_PST 0x1A
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#define APDS9253_LS_THRES_UP_0 0x21
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#define APDS9253_LS_THRES_UP_1 0x22
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#define APDS9253_LS_THRES_UP_2 0x23
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#define APDS9253_LS_THRES_LOW_0 0x24
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#define APDS9253_LS_THRES_LOW_1 0x25
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#define APDS9253_LS_THRES_LOW_2 0x26
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#define APDS9253_LS_THRES_VAR 0x27
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#define APDS9253_DK_CNT_STOR 0x29
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struct apds9253_config {
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struct i2c_dt_spec i2c;
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struct gpio_dt_spec int_gpio;
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uint8_t ls_gain;
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uint8_t ls_rate;
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uint8_t ls_resolution;
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bool interrupt_enabled;
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};
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struct apds9253_data {
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struct gpio_callback gpio_cb;
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struct k_work work;
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const struct device *dev;
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uint32_t sample_crgb[4];
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uint8_t pdata;
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struct k_sem data_sem;
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};
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#endif /* ZEPHYR_DRIVERS_SENSOR_APDS9253_APDS9253_H_*/
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