89 lines
2.1 KiB
C
89 lines
2.1 KiB
C
/*
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* Copyright (c) 2019 Antmicro <www.antmicro.com>
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#define DT_DRV_COMPAT litex_pwm
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#include <zephyr/device.h>
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#include <zephyr/drivers/pwm.h>
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#include <zephyr/types.h>
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#include <soc.h>
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#define REG_EN_ENABLE 0x1
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#define REG_EN_DISABLE 0x0
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/* PWM device in LiteX has only one channel */
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#define NUMBER_OF_CHANNELS 1
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struct pwm_litex_cfg {
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uint32_t reg_en;
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uint32_t reg_width;
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uint32_t reg_period;
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};
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int pwm_litex_init(const struct device *dev)
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{
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const struct pwm_litex_cfg *cfg = dev->config;
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litex_write8(REG_EN_ENABLE, cfg->reg_en);
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return 0;
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}
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int pwm_litex_set_cycles(const struct device *dev, uint32_t channel,
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uint32_t period_cycles,
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uint32_t pulse_cycles, pwm_flags_t flags)
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{
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const struct pwm_litex_cfg *cfg = dev->config;
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if (channel >= NUMBER_OF_CHANNELS) {
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return -EINVAL;
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}
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litex_write8(REG_EN_DISABLE, cfg->reg_en);
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litex_write32(pulse_cycles, cfg->reg_width);
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litex_write32(period_cycles, cfg->reg_period);
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litex_write8(REG_EN_ENABLE, cfg->reg_en);
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return 0;
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}
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int pwm_litex_get_cycles_per_sec(const struct device *dev, uint32_t channel,
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uint64_t *cycles)
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{
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if (channel >= NUMBER_OF_CHANNELS) {
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return -EINVAL;
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}
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*cycles = sys_clock_hw_cycles_per_sec();
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return 0;
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}
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static const struct pwm_driver_api pwm_litex_driver_api = {
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.set_cycles = pwm_litex_set_cycles,
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.get_cycles_per_sec = pwm_litex_get_cycles_per_sec,
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};
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/* Device Instantiation */
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#define PWM_LITEX_INIT(n) \
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static const struct pwm_litex_cfg pwm_litex_cfg_##n = { \
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.reg_en = DT_INST_REG_ADDR_BY_NAME(n, enable), \
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.reg_width = DT_INST_REG_ADDR_BY_NAME(n, width), \
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.reg_period = DT_INST_REG_ADDR_BY_NAME(n, period), \
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}; \
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\
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DEVICE_DT_INST_DEFINE(n, \
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pwm_litex_init, \
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NULL, \
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NULL, \
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&pwm_litex_cfg_##n, \
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POST_KERNEL, \
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CONFIG_PWM_LITEX_INIT_PRIORITY, \
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&pwm_litex_driver_api \
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);
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DT_INST_FOREACH_STATUS_OKAY(PWM_LITEX_INIT)
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