zephyr/tests/benchmarks
Daniel Leung a6c1f80f46 tests: benchmarks/latency: limit CPU to 1 for Intel ADSP ACE
Due to addition of busy threads running on other cores, and
the simulator runs in single thread bouncing through all cores,
we are wasting quite a bit of time just busy waiting. This makes
each simulator run too long for CI. So limit CPU number to 1.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2024-11-16 15:54:36 -05:00
..
app_kernel
cmsis_dsp boards: mps3: Add support for corstone300/an552 2024-10-26 03:58:05 +01:00
data_structure_perf
footprints
latency_measure tests: benchmarks/latency: limit CPU to 1 for Intel ADSP ACE 2024-11-16 15:54:36 -05:00
mbedtls
sched tests: benchmarks/sched: limit CPU to 1 for Intel ADSP ACE 2024-11-16 14:07:08 -05:00
sched_queues
sched_userspace
sys_kernel
wait_queues