127 lines
4.1 KiB
C
127 lines
4.1 KiB
C
/*
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* Copyright (c) 2016-2017 Piotr Mienkowski
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* Copyright (c) 2021 ATL Electronics
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* Copyright (c) 2022 Cypress Semiconductor Corporation (an Infineon company) or
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* an affiliate of Cypress Semiconductor Corporation
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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*/
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/**
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* @brief Infineon CAT1 SoC specific helpers for pinctrl driver.
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*/
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#ifndef ZEPHYR_SOC_ARM_INFINEON_CAT1_COMMON_PINCTRL_SOC_H_
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#define ZEPHYR_SOC_ARM_INFINEON_CAT1_COMMON_PINCTRL_SOC_H_
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#include <stdint.h>
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#include <zephyr/devicetree.h>
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#ifdef __cplusplus
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extern "C" {
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#endif
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/** @cond INTERNAL_HIDDEN */
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/**
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* Bit definition in PINMUX field
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*/
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#define SOC_PINMUX_PORT_MASK GENMASK(7, 0)
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#define SOC_PINMUX_PIN_MASK GENMASK(15, 8)
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#define SOC_PINMUX_HSIOM_MASK GENMASK(23, 16)
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#define SOC_PINMUX_SIGNAL_MASK GENMASK(31, 24)
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/*
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* Pin flags/attributes
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*/
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#define SOC_GPIO_DEFAULT (0)
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#define SOC_GPIO_FLAGS_POS (0)
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#define SOC_GPIO_FLAGS_MASK GENMASK(6, 0)
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#define SOC_GPIO_PULLUP_POS (0)
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#define SOC_GPIO_PULLUP BIT(SOC_GPIO_PULLUP_POS)
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#define SOC_GPIO_PULLDOWN_POS (1)
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#define SOC_GPIO_PULLDOWN BIT(SOC_GPIO_PULLDOWN_POS)
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#define SOC_GPIO_OPENDRAIN_POS (2)
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#define SOC_GPIO_OPENDRAIN BIT(SOC_GPIO_OPENDRAIN_POS)
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#define SOC_GPIO_OPENSOURCE_POS (3)
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#define SOC_GPIO_OPENSOURCE BIT(SOC_GPIO_OPENSOURCE_POS)
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/* Push-Pull means Strong, see dts/pinctrl/pincfg-node.yaml */
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#define SOC_GPIO_PUSHPULL_POS (4)
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#define SOC_GPIO_PUSHPULL BIT(SOC_GPIO_PUSHPULL_POS)
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/* Input-Enable means Input-Buffer, see dts/pinctrl/pincfg-node.yaml */
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#define SOC_GPIO_INPUTENABLE_POS (5)
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#define SOC_GPIO_INPUTENABLE BIT(SOC_GPIO_INPUTENABLE_POS)
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#define SOC_GPIO_HIGHZ_POS (6)
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#define SOC_GPIO_HIGHZ BIT(SOC_GPIO_HIGHZ_POS)
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/** Type for CAT1 Soc pin. */
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typedef struct {
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/**
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* Pinmux settings (port, pin and function).
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* [0..7] - Port nunder
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* [8..15] - Pin number
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* [16..23]- HSIOM function
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*/
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uint32_t pinmux;
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/** Pin configuration (bias, drive and slew rate). */
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uint32_t pincfg;
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} pinctrl_soc_pin_t;
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#define CAT1_PINMUX_GET_PORT_NUM(pinmux) FIELD_GET(SOC_PINMUX_PORT_MASK, pinmux)
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#define CAT1_PINMUX_GET_PIN_NUM(pinmux) FIELD_GET(SOC_PINMUX_PIN_MASK, pinmux)
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#define CAT1_PINMUX_GET_HSIOM_FUNC(pinmux) FIELD_GET(SOC_PINMUX_HSIOM_MASK, pinmux)
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/**
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* @brief Utility macro to initialize pinmux field in #pinctrl_pin_t.
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* @param node_id Node identifier.
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*/
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#define Z_PINCTRL_CAT1_PINMUX_INIT(node_id) DT_PROP(node_id, pinmux)
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/**
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* @brief Utility macro to initialize pincfg field in #pinctrl_pin_t.
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* @param node_id Node identifier.
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*/
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#define Z_PINCTRL_CAT1_PINCFG_INIT(node_id) ( \
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(DT_PROP(node_id, bias_pull_up) << SOC_GPIO_PULLUP_POS) | \
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(DT_PROP(node_id, bias_pull_down) << SOC_GPIO_PULLDOWN_POS) | \
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(DT_PROP(node_id, drive_open_drain) << SOC_GPIO_OPENDRAIN_POS) | \
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(DT_PROP(node_id, drive_open_source) << SOC_GPIO_OPENSOURCE_POS) | \
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(DT_PROP(node_id, drive_push_pull) << SOC_GPIO_PUSHPULL_POS) | \
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(DT_PROP(node_id, input_enable) << SOC_GPIO_INPUTENABLE_POS) | \
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(DT_PROP(node_id, bias_high_impedance) << SOC_GPIO_HIGHZ_POS))
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/**
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* @brief Utility macro to initialize each pin.
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*
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* @param node_id Node identifier.
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* @param state_prop State property name.
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* @param idx State property entry index.
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*/
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#define Z_PINCTRL_STATE_PIN_INIT(node_id, state_prop, idx) \
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{ .pinmux = Z_PINCTRL_CAT1_PINMUX_INIT( \
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DT_PROP_BY_IDX(node_id, state_prop, idx)), \
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.pincfg = Z_PINCTRL_CAT1_PINCFG_INIT( \
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DT_PROP_BY_IDX(node_id, state_prop, idx)) },
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/**
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* @brief Utility macro to initialize state pins contained in a given property.
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*
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* @param node_id Node identifier.
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* @param prop Property name describing state pins.
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*/
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#define Z_PINCTRL_STATE_PINS_INIT(node_id, prop) \
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{ DT_FOREACH_PROP_ELEM(node_id, prop, Z_PINCTRL_STATE_PIN_INIT) }
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/** @endcond */
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#ifdef __cplusplus
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}
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#endif
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#endif /* ZEPHYR_SOC_ARM_INFINEON_CAT1_COMMON_PINCTRL_SOC_H_ */
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