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zephyr/boards/xtensa/nxp_adsp_imx8m
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Laurentiu Mihalcea ca3dd23846 boards: xtensa: Set DCACHE_LINE_SIZE for all SOF-supported NXP SoCs 
This commit sets the DCACHE_LINE_SIZE config for all xtensa-based
NXP SoCs for SOF usage.

Signed-off-by: Laurentiu Mihalcea <laurentiu.mihalcea@nxp.com>
2023-05-17 18:34:24 -04:00
..
board.cmake
Kconfig.board boards: xtensa: nxp_adsp_imx8m: update board config based on renamed soc 2023-05-08 13:06:12 -05:00
Kconfig.defconfig boards: xtensa: nxp_adsp_imx8m: update board config based on renamed soc 2023-05-08 13:06:12 -05:00
nxp_adsp_imx8m_defconfig boards: xtensa: Set DCACHE_LINE_SIZE for all SOF-supported NXP SoCs 2023-05-17 18:34:24 -04:00
nxp_adsp_imx8m_uart.conf boards: xtensa: nxp_adsp_imx8m: Add UART support for the ADSP from i.MX8MP 2023-05-08 13:06:12 -05:00
nxp_adsp_imx8m_uart.overlay boards: xtensa: nxp_adsp_imx8m: include pinctrl dtsi in overlay 2023-05-11 13:39:59 -05:00
nxp_adsp_imx8m.dts boards: xtensa: nxp_adsp_imx8m: include pinctrl dtsi in overlay 2023-05-11 13:39:59 -05:00
nxp_adsp_imx8m.yaml boards: xtensa: nxp_adsp_imx8m: Add UART support for the ADSP from i.MX8MP 2023-05-08 13:06:12 -05:00