Gerard Marull-Paretas 6252e8576c arch: riscv: irq_manage: add missing PLIC header ... Module uses RISC-V PLIC interrupt controller API without including the necessary headers. Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>		2024-01-15 09:58:03 +01:00
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arc	arch: arc: use sys_cache instead of arch-function for enabling the cache	2024-01-10 09:59:58 +01:00
arm	arch: arm: core: cortex_m: fix cache disabling in init_arch_hw_at_boot	2024-01-10 09:59:58 +01:00
arm64	arch: smp: make flush_fpu_ipi a common, optional interfaces	2024-01-09 10:00:17 +01:00
common	arch: common: multilevel irq: verify interrupt level bits configuration	2023-12-08 08:40:41 -05:00
mips	arch: mips: use LOG_ERR to print exceptions	2023-12-14 09:32:27 +01:00
nios2	arch: guard more code with CONFIG_EXCEPTION_DEBUG	2023-12-14 09:32:27 +01:00
posix	posix: sched: Implement get APIs for scheduling parameters	2024-01-15 09:57:44 +01:00
riscv	arch: riscv: irq_manage: add missing PLIC header	2024-01-15 09:58:03 +01:00
sparc	arch: guard more code with CONFIG_EXCEPTION_DEBUG	2023-12-14 09:32:27 +01:00
x86	arch: x86_64: split irq.c into multiple files	2024-01-09 10:00:17 +01:00
xtensa	xtensa: mmu: Fix mmu initialization	2024-01-11 10:05:22 +01:00
CMakeLists.txt	…
Kconfig	arch: make CONFIG_EXCEPTION_DEBUG cross arch config	2023-12-14 09:32:27 +01:00