59 lines
1.0 KiB
Plaintext
59 lines
1.0 KiB
Plaintext
/*
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* Copyright (C) 2023, Intel Corporation
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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/dts-v1/;
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#include <skeleton.dtsi>
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/ {
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#address-cells = <1>;
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#size-cells = <1>;
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cpus {
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#address-cells = <1>;
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#size-cells = <0>;
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cpu0: cpu@0 {
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device_type = "cpu";
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compatible = "intel,niosv", "riscv";
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riscv,isa = "rv32ima_zicsr_zifencei";
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reg = <0>;
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clock-frequency = <50000000>;
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/* Platform interrupts IRQs index start from 16 */
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intc: interrupt-controller {
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compatible = "riscv,cpu-intc";
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#address-cells = <0>;
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#interrupt-cells = <1>;
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interrupt-controller;
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};
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};
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};
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soc {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "intel,niosv-g-soc", "simple-bus";
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interrupt-parent = <&intc>;
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ranges;
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sram0: memory@0 {
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compatible = "mmio-sram";
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};
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mtimer: machine-timer@90000 {
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compatible = "niosv-machine-timer";
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reg = <0x90000 0x10>;
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interrupts = <7>;
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};
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uart0: serial@90078 {
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compatible = "altr,jtag-uart";
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interrupts = <16>;
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status = "disabled";
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};
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};
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};
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