84 lines
1.8 KiB
YAML
84 lines
1.8 KiB
YAML
description: ESP32 SPI
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compatible: "espressif,esp32-spi"
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include: [spi-controller.yaml, pinctrl-device.yaml]
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properties:
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reg:
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required: true
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pinctrl-0:
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required: true
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pinctrl-names:
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required: true
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half-duplex:
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type: boolean
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description: |
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Enable half-duplex communication mode.
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Transmit data before receiving it, instead of simultaneously
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dummy-comp:
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type: boolean
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description: Enable dummy SPI compensation cycles
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sio:
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type: boolean
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description: |
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Enable 3-wire mode
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Use MOSI for both sending and receiving data
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dma-enabled:
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type: boolean
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description: Enable SPI DMA support
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dma-clk:
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type: int
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description: DMA clock source
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dma-host:
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type: int
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description: DMA Host - 0 -> SPI2, 1 -> SPI3
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clk-as-cs:
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type: boolean
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description: |
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Support to toggle the CS while the clock toggles
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Output clock on CS line if CS is active
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positive-cs:
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type: boolean
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description: Make CS positive during a transaction instead of negative
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use-iomux:
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type: boolean
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description: |
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Some pins are allowed to bypass the GPIO Matrix and use the IO_MUX
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routing mechanism instead, this avoids extra routing latency and makes
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possible the use of operating frequencies higher than 20 MHz.
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Refer to SoC's Technical Reference Manual to check which pins are
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allowed to use this routing path.
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cs-setup-time:
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type: int
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description: |
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Chip select setup time setting, see TRF for SOC for details of
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timing applied.
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cs-hold-time:
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type: int
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description: |
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Chip select hold time setting, see TRF for SOC for details of
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timing applied.
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line-idle-low:
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type: boolean
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description: |
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Default MISO and MOSI pins GPIO level when idle. Defaults to high by default.
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