93 lines
2.5 KiB
YAML
93 lines
2.5 KiB
YAML
# Copyright (c) 2020 STMICROELECTRONICS
|
|
# SPDX-License-Identifier: Apache-2.0
|
|
|
|
# Common fields for STM32 UART peripherals.
|
|
description: STM32 UART-BASE
|
|
|
|
include:
|
|
- name: uart-controller.yaml
|
|
property-blocklist:
|
|
- clock-frequency
|
|
- name: pinctrl-device.yaml
|
|
- name: reset-device.yaml
|
|
- name: uart-controller-pin-inversion.yaml
|
|
|
|
properties:
|
|
reg:
|
|
required: true
|
|
|
|
clocks:
|
|
required: true
|
|
|
|
resets:
|
|
required: true
|
|
|
|
interrupts:
|
|
required: true
|
|
|
|
single-wire:
|
|
type: boolean
|
|
description: |
|
|
Enable the single wire half-duplex communication.
|
|
Using this mode, TX and RX lines are internally connected and
|
|
only TX pin is used afterwards and should be configured.
|
|
RX/TX conflicts must be handled on user side.
|
|
|
|
tx-rx-swap:
|
|
type: boolean
|
|
description:
|
|
Swap the TX and RX pins. Used in case of a cross wired connection.
|
|
|
|
pinctrl-0:
|
|
required: true
|
|
|
|
pinctrl-names:
|
|
required: true
|
|
|
|
wakeup-line:
|
|
type: int
|
|
description: |
|
|
EXTI line number matching the device wakeup interrupt mask register.
|
|
This property is required on stm32 devices where the wakeup interrupt signal could be
|
|
configured masked at boot (sm32wl55 for instance), preventing the device to wakeup
|
|
the core from stop mode(s).
|
|
Valid range: 0 - 31
|
|
|
|
de-enable:
|
|
type: boolean
|
|
description: |
|
|
Enable activating an external transeiver through the DE pin which must also be configured
|
|
using pinctrl.
|
|
|
|
de-assert-time:
|
|
type: int
|
|
default: 0
|
|
description: |
|
|
Defines the time between the activation of the DE signal and the beginning of the start bit.
|
|
It is expressed in 16th of a bit time.
|
|
Valid range: 0 - 31
|
|
|
|
de-deassert-time:
|
|
type: int
|
|
default: 0
|
|
description: |
|
|
Defines the time between the activation of the DE signal and the beginning of the start bit.
|
|
It is expressed in 16th of a bit time.
|
|
Valid range: 0 - 31
|
|
|
|
de-invert:
|
|
type: boolean
|
|
description: |
|
|
Invert the binary logic of the de pin. When enabled, physical logic levels are inverted and
|
|
we use 1=Low, 0=High instead of 1=High, 0=Low.
|
|
|
|
fifo-enable:
|
|
type: boolean
|
|
description: |
|
|
Enables transmit and receive FIFO using default FIFO configuration (typically threshold is
|
|
set to 1/8).
|
|
In TX, FIFO allows to work in burst mode, easing scheduling of loaded applications. It also
|
|
allows more reliable communication with UART devices sensitive to variation of inter-frames
|
|
delays.
|
|
In RX, FIFO reduces overrun occurrences.
|