119 lines
3.7 KiB
YAML
119 lines
3.7 KiB
YAML
description: INFINEON XMC4XXX UART
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compatible: "infineon,xmc4xxx-uart"
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include: [uart-controller.yaml, pinctrl-device.yaml]
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properties:
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reg:
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required: true
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input-src:
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description: |
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Connects the UART receive line (USIC DX0 input) to a specific GPIO pin.
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The USIC DX0 input is a multiplexer which connects to different GPIO pins.
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Refer to the XMC4XXX reference manual for the GPIO pin/mux mappings. DX0G
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is the loopback input line.
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type: string
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required: true
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enum:
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- "DX0A"
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- "DX0B"
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- "DX0C"
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- "DX0D"
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- "DX0E"
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- "DX0F"
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- "DX0G"
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pinctrl-0:
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required: true
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pinctrl-names:
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required: true
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fifo-start-offset:
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description: |
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Each USIC0..2 has a fifo that is shared between two channels. For example,
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usic0ch0 and usic0ch1 will share the same fifo. This parameter defines an offset
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where the tx and rx fifos will start. When sharing the fifo, the user must properly
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define the offset based on the configuration of the other channel. The fifo has a
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capacity of 64 entries. The tx/rx fifos are created on fifo-xx-size aligned
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boundaries.
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required: true
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type: int
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fifo-tx-size:
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description: |
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Fifo size used for buffering transmit bytes. A value of 0 implies that
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the fifo is not used while transmitting. transmitting. If the UART is used in async mode
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then fifo-tx-size should be set to 0.
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required: true
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type: int
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enum:
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- 0
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- 2
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- 4
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- 8
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- 16
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- 32
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- 64
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fifo-rx-size:
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description: |
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Fifo size used for buffering received bytes. A value of 0 implies that
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the fifo is not used while receiving. If the UART is used in async mode
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then fifo-rx-size should be set to 0.
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required: true
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type: int
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enum:
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- 0
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- 2
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- 4
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- 8
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- 16
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- 32
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- 64
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interrupts:
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description: |
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IRQ number and priority to use for interrupt driven UART.
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USIC0..2 have their own interrupt range as follows:
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USIC0 = [84, 89]
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USIC1 = [90, 95]
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USIC2 = [96, 101]
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dmas:
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description: |
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Optional TX & RX dma specifiers used by async UART.
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The dmas are referenced in the UART node using the following syntax:
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dmas = <&dma1 1 0 XMC4XXX_SET_CONFIG(10,6)>, <&dma1 2 0 XMC4XXX_SET_CONFIG(11,6)>;
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where the first entry is for the TX, and the second for RX.
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The parameters in the dma entry are: dma device phandle, dma channel, dma priority (0 is
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lowest and 7 is highest), and an opaque entry for the dma line routing parameters set
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by the macro XMC4XXX_SET_CONFIG(line, request_source). Use the following steps to properly
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select parameters line, request_source:
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1. Select a dma device and a free dma channel.
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1. Select a free dma line. dma0 device can only connect to lines [0, 7] and
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dma1 can connect to lines [8, 11].
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2. For a given interrupt, calculate the service request (SR) number. Note the following
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simple mapping: in USIC0 interrupt 84->SR0, interrupt 85->SR1, ... etc.
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In USIC1, interrupt 90->SR0, 91->SR1, etc.
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3. Select request_source from Table "DMA Request Source Selection" in XMC4XXX reference
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manual.
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For example, say we select interrupt 85 on USIC0, dma0, channel 3, priority 4, and line 7.
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The interrupt would map to SR1. From Table "DMA Request Source Selection", request_source
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would need to be set to 10 and the dts entry would be:
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dma = <&dma0 3 4 XMC4XXX_SET_CONFIG(7,10) ... >;
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dma-names:
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description: |
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Required if the dmas property exists. Should be set to "tx" and "rx"
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to match the dmas property.
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For example
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dma-names = "tx", "rx";
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