76 lines
2.0 KiB
YAML
76 lines
2.0 KiB
YAML
# Copyright (c) 2023 Antmicro <www.antmicro.com>
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# SPDX-License-Identifier: Apache-2.0
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description: |
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Quicklogic EOS S3 IO MUX binding covers the 46 IOMUX_PAD_x_CTRL registers
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that can be used to set the direction and the function of a pad.
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Device pin configuration should be placed in the child nodes of this node.
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Populate the 'pinmux' field with IO function and pin number.
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For example, setting pins 44 and 45 for use as UART would look like this:
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#include <dt-bindings/pinctrl/quicklogic-eos-s3-pinctrl.h>
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&pinctrl {
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uart0_rx_default: uart0_rx_default {
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pinmux = <UART_RX_PAD45>;
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input-enable;
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};
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uart0_tx_default: uart0_tx_default {
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pinmux = <UART_TX_PAD44>;
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output-enable;
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};
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};
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compatible: "quicklogic,eos-s3-pinctrl"
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include: base.yaml
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properties:
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reg:
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required: true
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child-binding:
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description: |
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This binding gives a base representation of the SiFive FE310 pins
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configuration.
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include:
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- name: pincfg-node.yaml
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property-allowlist:
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- input-enable
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- output-enable
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- bias-pull-up
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- bias-pull-down
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- bias-high-impedance
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- input-schmitt-enable
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- drive-strength
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properties:
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pinmux:
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required: true
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type: array
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description: |
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Quicklogic EOS S3 pin's configuration (pin, IO function).
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slew-rate:
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description: |
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The default value "slow" matches the power-on reset value.
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default: "slow"
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type: string
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enum:
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- "slow"
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- "fast"
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quicklogic,control-selection:
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description: |
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Control selection for IO output.
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It's either controlled from registers of the A0 always-on domain,
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fabric-controlled for signaling with FPGA,
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or other-controller for bidirectional signals.
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The default value "a0registers" matches the power-on reset value.
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default: "a0registers"
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type: string
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enum:
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- "a0registers"
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- "others"
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- "fabric"
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