79 lines
2.5 KiB
YAML
79 lines
2.5 KiB
YAML
# Copyright 2022-2024 NXP
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# SPDX-License-Identifier: Apache-2.0
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description: |
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Kinetis pinctrl node. This node will define pin configurations in pin groups,
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and has the 'pinctrl' node identifier in the SOC's devicetree. Each group
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within the pin configuration defines the pin configuration for a peripheral,
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and each numbered subgroup in the pin group defines all the pins for that
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peripheral with the same configuration properties. The 'pins' property in
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a group selects the pins to be configured, and the remaining properties set
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configuration values for those pins. Here is an example group for UART0 pins:
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uart0_default: uart0_default {
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group0 {
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pins = <UART0_RX_PTB16
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UART0_TX_PTB17>;
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drive-strength = "low";
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slew-rate = "fast";
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};
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};
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If only the required properties are supplied, the pin configuration register
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will be assigned the following values:
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PCR_PS=0,
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PCR_PE=0,
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PCR_ODE=0,
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PCR_SRE=<slew-rate selection>,
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PCR_DSE=<drive-strength selection>,
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PCR_PFE=0
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compatible: "nxp,kinetis-pinctrl"
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include: base.yaml
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child-binding:
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description: Kinetis pin controller pin group
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child-binding:
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description: |
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Kinetis pin controller pin configuration node
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include:
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- name: pincfg-node.yaml
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property-allowlist:
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- drive-open-drain
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- bias-pull-up
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- bias-pull-down
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- input-enable
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properties:
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pinmux:
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required: true
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type: array
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description: |
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Pin mux selections for this group. See the soc level pinctrl DTSI file
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in NXP's HAL for a defined list of these options
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drive-strength:
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required: true
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type: string
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enum:
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- "low"
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- "high"
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description: |
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Pin output drive strength. Sets the DSE field in the PORTx_PCRn register.
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0 DSE_0- low drive strength when pin is configured as output
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1 DSE_1- high drive strength when pin is configured as output
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slew-rate:
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type: string
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enum:
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- "fast"
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- "slow"
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description: |
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Pin output slew rate. Sets the SRE field in the PORTx_PCRn register.
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0 SRE_0_fast- fast slew rate when pin is configured as output
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1 SRE_1_slow- slow slew rate when pin is configured as output
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nxp,passive-filter:
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type: boolean
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description: |
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Enable passive filter on pin. Sets the PFE field in the PORTx_PCRn register.
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