113 lines
3.8 KiB
YAML
113 lines
3.8 KiB
YAML
# Copyright (c) 2022 NXP
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# SPDX-License-Identifier: Apache-2.0
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description: |
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The node has the 'pinctrl' node label set in MCUX SoC's devicetree. These
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nodes can be autogenerated using the MCUXpresso config tools combined with
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the imx_dts_gen.py script in NXP's HAL. The mux, mode, input, daisy, and cfg
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fields in a group select the pins to be configured, and the remaining
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devicetree properties set configuration values for those pins
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for example, here is an group configuring UART2 pins:
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group0 {
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pinmux = <&iomuxc_uart2_rxd_uart_rx_uart2_rx,
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&iomuxc_uart2_txd_uart_tx_uart2_tx>;
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drive-strength = "40-ohm";
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slew-rate = "slow";
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};
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This will select UART2_RXD as UART2 rx, and UART2_TXD as UART2 tx.
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Both pins will be configured with a slow slew rate, and maximum drive
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strength.
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Note that the soc level iomuxc dts file can be examined to find the possible
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pinmux options. Here are the affects of each property on the
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IOMUXC SW_PAD_CTL register:
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nxp,lvttl: LVTTL=1
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input-schmitt-enable: HYS=1
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bias-pull-up: PUE=1
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drive-open-drain: ODE=1
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slew-rate: SRE=<enum_idx>
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drive-strength: DSE=<enum_idx>
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input-enable: SION=1 (in SW_MUX_CTL_PAD register)
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If only required properties are supplied, the pin will have the following
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configuration:
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LVTLL=0,
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HYS=0,
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PUE=0,
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ODE=0,
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SRE=<slew-rate>,
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DSE=<drive-strength>,
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SION=0,
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compatible: "nxp,imx8m-pinctrl"
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include: base.yaml
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child-binding:
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description: iMX pin controller pin group
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child-binding:
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description: |
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iMX pin controller pin configuration node.
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include:
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- name: pincfg-node.yaml
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property-allowlist:
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- input-schmitt-enable
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- drive-open-drain
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- input-enable
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- bias-pull-up
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- bias-pull-down
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properties:
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pinmux:
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required: true
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type: phandles
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description: |
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Pin mux selections for this group. See the soc level iomuxc DTSI file
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for a defined list of these options.
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drive-strength:
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required: true
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type: string
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enum:
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- "disabled"
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- "255-ohm"
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- "105-ohm"
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- "75-ohm"
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- "85-ohm"
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- "65-ohm"
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- "45-ohm"
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- "40-ohm"
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description: |
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Pin output drive strength. Sets the DSE field in the IOMUXC peripheral.
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the drive strength is expressed as a output impedance at a given voltage,
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but maximum current values can be calculated from these impedances
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for a specific load impedance.
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000 HI-Z — Output driver is disabled (Hi-Z State)
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001 255_OHM — 255 Ohm @3.3V, 240 Ohm @2.5V, 230 Ohm @1.8V, 265 Ohm @1.2V
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010 105_OHM — 105 Ohm @3.3V, 100 Ohm @2.5V, 85 Ohm @1.8V, 110 Ohm @1.2V
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011 75_OHM — 75 Ohm @3.3V, 70 Ohm @2.5V, 60 Ohm @1.8V, 80 Ohm @1.2V
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100 85_OHM — 85 Ohm @3.3V, 80 Ohm @2.5V, 75 Ohm @1.8V, 90 Ohm @1.2V
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101 65_OHM — 65 Ohm @3.3V, 60 Ohm @2.5V, 55 Ohm @1.8V, 65 Ohm @1.2V
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110 45_OHM — 45 Ohm @3.3V, 45 Ohm @2.5V, 40 Ohm @1.8V, 50 Ohm @1.2V
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111 40_OHM — 40 Ohm @3.3V, 40 Ohm @2.5V, 33 Ohm @1.8V, 40 Ohm @1.2V
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slew-rate:
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required: true
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type: string
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enum:
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- "slow"
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- "medium"
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- "fast"
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- "max"
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description: |
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Select slew rate for pin. Corresponds to SRE field in IOMUXC peripheral
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00 SLOW — Slow Frequency Slew Rate (50Mhz)
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01 MEDIUM — Medium Frequency Slew Rate (100Mhz)
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10 FAST — Fast Frequency Slew Rate (150Mhz)
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11 MAX — Max Frequency Slew Rate (200Mhz)
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nxp,lvttl:
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type: boolean
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description: |
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Enable LVTTL input. Sets LVTTL field in IOMUXC peripheral
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