94 lines
2.7 KiB
YAML
94 lines
2.7 KiB
YAML
# Copyright (c) 2022 NXP
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# SPDX-License-Identifier: Apache-2.0
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description: |
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The node has the 'pinctrl' node label set in MCUX SoC's devicetree. These
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nodes can be autogenerated using the MCUXpresso config tools combined with
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the imx_dts_gen.py script in NXP's HAL. The mux, mode, input, daisy, and cfg
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fields in a group select the pins to be configured, and the remaining
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devicetree properties set configuration values for those pins
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Note that the soc level iomuxc dts file can be examined to find the possible
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pinmux options. Here are the affects of each property on the
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IOMUXC SW_PAD_CTL register:
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bias-pull-up: PE=1, PS=<bias-pull-up-value index>
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bias-pull-down: PE=1, PS=0
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input-schmitt-enable: HYS=1
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slew-rate: SRE=<enum idx>
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drive-strength: DSE=<enum idx>
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input-enable: SION=1 (in SW_PAD_CTL_MUX register)
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If only required properties are supplied, the pin will have the following
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configuration:
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HYS=0,
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PS=0,
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PE=0
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SRE=<slew-rate>,
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DSE=<drive-strength>,
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SION=0,
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Note that pins marked with LPSR can only have their PE and PS registers
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configured
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compatible: "nxp,imx7d-pinctrl"
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include: base.yaml
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child-binding:
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description: iMX pin controller pin group
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child-binding:
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description: |
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iMX pin controller pin configuration node.
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include:
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- name: pincfg-node.yaml
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property-allowlist:
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- input-schmitt-enable
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- input-enable
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- bias-pull-up
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- bias-pull-down
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properties:
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pinmux:
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required: true
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type: phandles
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description: |
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Pin mux selections for this group. See the soc level iomuxc DTSI file
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for a defined list of these options.
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drive-strength:
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required: true
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type: string
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enum:
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- "x1"
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- "x4"
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- "x2"
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- "x6"
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description: |
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Pin output drive strength. Sets the DSE field in the IOMUXC peripheral.
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slew-rate:
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required: true
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type: string
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enum:
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- "fast"
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- "slow"
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description: |
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Select slew rate for pin. Corresponds to SRE field in IOMUXC peripheral
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0 FAST — Fast Frequency Slew Rate
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1 SLOW — Slow Frequency Slew Rate
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bias-pull-up-value:
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type: string
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default: "100k"
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enum:
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- "unused"
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- "5k"
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- "47k"
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- "100k"
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description: |
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Select pull up resistor value. Sets PS field in IOMUXC peripheral.
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Default of 100k as this is most common default register value for
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SOC pads.
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01: 5K- 5K pull up resistor
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10: 47K- 47K pull up resistor
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11: 100K- 100K pull up resistor
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