109 lines
3.4 KiB
YAML
109 lines
3.4 KiB
YAML
# Copyright (c) 2020, Linaro Limited
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# Copyright (c) 2021, Teslabs Engineering S.L.
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# Copyright (c) 2021-2022, Gerson Fernando Budke <nandojve@gmail.com>
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# SPDX-License-Identifier: Apache-2.0
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description: |
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Atmel SAM Pinctrl container node
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The Atmel SAM pin controller is a singleton node responsible for controlling
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pin function selection and pin properties. For example, you can use this node
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to route USART0 RX to pin PA10 and enable the pull-up resistor on the pin.
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The node has the 'pinctrl' node label set in your SoC's devicetree, so you can
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modify it like this:
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&pinctrl {
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/* your modifications go here */
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};
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All device pin configurations should be placed in child nodes of the 'pinctrl'
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node, as shown in this example:
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/** You can put this in places like a <board>-pinctrl.dtsi file in
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* your board directory, or a devicetree overlay in your application.
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*/
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/** include pre-defined combinations for the SoC variant used by the board */
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#include <dt-bindings/pinctrl/sam4sXc-pinctrl.h>
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&pinctrl {
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/* configuration for the usart0 "default" state */
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usart0_default: usart0_default {
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/* group 1 */
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group1 {
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/* configure PA6 as USART0 TX and PA8 as USART0 CTS */
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pinmux = <PA6A_USART0_TXD0>, <PA8A_USART0_CTS0>;
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};
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/* group 2 */
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group2 {
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/* configure PA5 as USART0 RX and PA7 as USART0 RTS */
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pinmux = <PA5A_USART0_RXD0>, <PA7A_USART0_RTS0>;
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/* both PA5 and PA7 have pull-up enabled */
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bias-pull-up;
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};
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};
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};
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The 'usart0_default' child node encodes the pin configurations for a
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particular state of a device; in this case, the default (that is, active)
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state.
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As shown, pin configurations are organized in groups within each child node.
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Each group can specify a list of pin function selections in the 'pinmux'
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property.
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A group can also specify shared pin properties common to all the specified
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pins, such as the 'bias-pull-up' property in group 2. Here is a list of
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supported standard pin properties:
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- bias-pull-up: Enable pull-up resistor.
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- bias-pull-down: Enable pull-down resistor.
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- drive-open-drain: Open-drain drive mode.
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To link pin configurations with a device, use a pinctrl-N property for some
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number N, like this example you could place in your board's DTS file:
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#include "board-pinctrl.dtsi"
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&usart0 {
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pinctrl-0 = <&usart0_default>;
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pinctrl-names = "default";
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};
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compatible: "atmel,sam-pinctrl"
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include: base.yaml
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properties:
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"#address-cells":
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required: true
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const: 1
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"#size-cells":
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required: true
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const: 1
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child-binding:
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description: |
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Each child node defines the configuration for a particular state.
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child-binding:
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description: |
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The grandchild nodes group pins that share the same pin configuration.
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include:
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- name: pincfg-node.yaml
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property-allowlist:
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- bias-pull-up
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- bias-pull-down
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- drive-open-drain
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properties:
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pinmux:
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required: true
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type: array
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description: |
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An array of pins sharing the same group properties. The pins should
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be defined using pre-defined macros or, alternatively, using the
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SAM_PINMUX utility macros depending on the pinmux model used by the
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SoC series.
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