74 lines
1.6 KiB
YAML
74 lines
1.6 KiB
YAML
description: stm32 sdmmc disk access
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compatible: "st,stm32-sdmmc"
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include: [mmc.yaml, pinctrl-device.yaml, reset-device.yaml]
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properties:
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clocks:
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required: true
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reg:
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required: true
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resets:
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required: true
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pinctrl-0:
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required: true
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pinctrl-names:
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required: true
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cd-gpios:
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type: phandle-array
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description: Card Detect pin
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pwr-gpios:
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type: phandle-array
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description: Power pin
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bus-width:
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type: int
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default: 1
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description: |
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bus width for SDMMC access, defaults to the minimum necessary
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number of bus lines
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enum:
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- 1
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- 4
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- 8
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clk-div:
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type: int
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default: 0
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description: |
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Clock division factor for SDMMC. Typically the clock operates at 25MHz so
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a division factor of 2 would be 25MHz / 2 = 12.5MHz.
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idma:
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type: boolean
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description: |
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SDMMC device has an internal DMA. Internal DMA doesn't require any additional
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configuration using "dmas" property.
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Delete this property to use interrupt driven mode.
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dmas:
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description: |
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Optional DMA channel specifier. If DMA should be used, specifier should
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hold a phandle reference to the dma controller, the channel number,
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the slot number, channel configuration and finally features.
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Only priority bits are used in the configuration. There are no feature
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flags.
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For example dmas for TX/RX on SDMMC
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dmas = <&dma2 4 6 0x30000 0x00>, <&dma2 4 3 0x30000 0x00>;
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dma-names:
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description: |
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DMA channel name. If DMA should be used, expected value is "tx", "rx".
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For example
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dma-names = "tx", "rx";
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