93 lines
1.7 KiB
YAML
93 lines
1.7 KiB
YAML
# Copyright (c) 2024 Nordic Semiconductor ASA
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# SPDX-License-Identifier: Apache-2.0
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description: |
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Nordic Auxiliary PLL (Phase Locked Loop)
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The output frequency (f_out) of the auxiliary PLL is calculated as follows:
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f_out = ((R + A * 2^(-16)) * f_src) / B
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where:
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- A: nordic,frequency
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- B: nordic,outdiv
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- R: nordic,range (3=low, 4=mid, 5=high, 6=statichigh)
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- f_src: Source frequency, given by clocks
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compatible: "nordic,nrf-auxpll"
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include:
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- base.yaml
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- clock-controller.yaml
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- nordic-nrf-ficr-client.yaml
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properties:
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reg:
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required: true
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interrupts:
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required: true
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clocks:
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required: true
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"#clock-cells":
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const: 0
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nordic,ficrs:
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required: true
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nordic,frequency:
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type: int
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required: true
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description: |
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Value used to set the fractional PLL divider ratio (can be set between
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divider ratios 4 to 5). Valid values range from 0 to 65535.
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nordic,out-div:
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type: int
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enum:
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- 1
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- 2
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- 3
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- 4
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- 6
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- 8
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- 12
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- 16
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description: PLL output divider.
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nordic,out-drive:
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type: int
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required: true
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enum:
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- 0
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- 1
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- 2
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- 3
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description: Output buffer drive strength.
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nordic,current-tune:
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type: int
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required: true
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description: Constant current tune for the ring oscillator
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nordic,sdm-disable:
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type: boolean
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description: Disable sigma-delta modulator
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nordic,dither-disable:
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type: boolean
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description: Disable dither in sigma-delta modulator
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nordic,range:
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type: string
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required: true
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enum:
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- "low"
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- "mid"
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- "high"
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- "statichigh"
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description: PLL loop divider range
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