230 lines
7.3 KiB
C
230 lines
7.3 KiB
C
/*
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* Copyright (c) 2016, Intel Corporation
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are met:
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*
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* 1. Redistributions of source code must retain the above copyright notice,
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* this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright notice,
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* this list of conditions and the following disclaimer in the documentation
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* and/or other materials provided with the distribution.
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* 3. Neither the name of the Intel Corporation nor the names of its
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* contributors may be used to endorse or promote products derived from this
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* software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE INTEL CORPORATION OR CONTRIBUTORS BE
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* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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#ifndef __QM_INTERRUPT_H__
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#define __QM_INTERRUPT_H__
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#include "qm_common.h"
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#include "qm_soc_regs.h"
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#if (QM_SENSOR)
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#include "qm_sensor_regs.h"
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#endif
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/*
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* Linear mapping between IRQs and interrupt vectors
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*/
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#if (QUARK_SE)
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#define QM_IRQ_TO_VECTOR(irq) (irq + 36) /* Get the vector of and IRQ. */
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#elif(QUARK_D2000)
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#define QM_IRQ_TO_VECTOR(irq) (irq + 32) /* Get the vector of and IRQ. */
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#endif
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#if (ENABLE_RESTORE_CONTEXT)
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#if (HAS_APIC) || (QM_SENSOR)
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/**
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* Save IRQ context.
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*
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* On x86:
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* - Save IOAPIC Redirection Table for all IRQs.
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*
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* On sensor:
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* - Save interrupt enable, priority and trigger for all IRQs.
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*
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* @param[out] ctx IRQ context structure. This must not be NULL.
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*
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* @return Standard errno return type for QMSI.
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* @retval 0 on success.
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* @retval Negative @ref errno for possible error codes.
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*/
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int qm_irq_save_context(qm_irq_context_t *const ctx);
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/**
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* Restore IRQ context.
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*
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* On x86:
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* Restore IOAPIC Redirection Table for all IRQs.
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* Restore LAPIC to default configuration.
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*
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* On sensor:
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* - Restore interrupt enable, priority and trigger for all IRQs.
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*
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* @param[in] ctx IRQ context structure. This must not be NULL.
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*
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* @return Standard errno return type for QMSI.
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* @retval 0 on success.
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* @retval Negative @ref errno for possible error codes.
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*/
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int qm_irq_restore_context(const qm_irq_context_t *const ctx);
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#endif /* HAS_APIC || QM_SENSOR */
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#endif /* ENABLE_RESTORE_CONTEXT */
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/**
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* Interrupt driver.
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*
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* @defgroup groupINT Interrupt
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* @{
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*/
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/**
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* Interrupt service routine type
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*/
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typedef void (*qm_isr_t)(struct interrupt_frame *frame);
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/**
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* Unconditionally enable interrupt delivery on the CPU.
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*/
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void qm_irq_enable(void);
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/**
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* Unconditionally disable interrupt delivery on the CPU.
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*/
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void qm_irq_disable(void);
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/**
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* Save interrupt state and disable all interrupts on the CPU.
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*
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* This routine disables interrupts. It can be called from either interrupt or
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* non-interrupt context. This routine returns an architecture-dependent
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* lock-out key representing the "interrupt disable state" prior to the call;
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* this key can be passed to qm_irq_unlock() to re-enable interrupts.
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*
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* This function can be called recursively: it will return a key to return the
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* state of interrupt locking to the previous level.
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*
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* @return An architecture-dependent lock-out key representing the "interrupt
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* disable state" prior to the call.
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*
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*/
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unsigned int qm_irq_lock(void);
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/**
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*
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* Restore previous interrupt state on the CPU saved via qm_irq_lock().
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*
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* @param[in] key architecture-dependent lock-out key returned by a previous
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* invocation of qm_irq_lock().
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*/
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void qm_irq_unlock(unsigned int key);
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/**
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* Unmask a given interrupt line.
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*
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* @param[in] irq Which IRQ to unmask.
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*/
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void qm_irq_unmask(uint32_t irq);
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/**
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* Mask a given interrupt line.
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*
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* @param[in] irq Which IRQ to mask.
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*/
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void qm_irq_mask(uint32_t irq);
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void _qm_register_isr(uint32_t vector, qm_isr_t isr);
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void _qm_irq_setup(uint32_t irq, uint16_t register_offset);
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/*
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* Request a given IRQ and register Interrupt Service Routine to interrupt
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* vector.
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*
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* @param[in] irq IRQ number. Must be of type QM_IRQ_XXX.
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* @param[in] isr ISR to register to given IRQ.
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*/
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#if (QM_SENSOR)
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#define qm_irq_request(irq, isr) \
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do { \
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_qm_register_isr(irq##_VECTOR, isr); \
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_qm_irq_setup(irq, irq##_MASK_OFFSET); \
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} while (0);
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#else
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#define qm_irq_request(irq, isr) \
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do { \
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qm_int_vector_request(irq##_VECTOR, isr); \
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\
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_qm_irq_setup(irq, irq##_MASK_OFFSET); \
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} while (0)
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#endif /* QM_SENSOR */
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/**
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* Request an interrupt vector and register Interrupt Service Routine to it.
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*
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* @param[in] vector Vector number.
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* @param[in] isr ISR to register to given IRQ.
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*/
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#if (UNIT_TEST)
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void qm_int_vector_request(uint32_t vector, qm_isr_t isr);
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#else
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#if (__iamcu__)
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/*
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* We assume that if the compiler supports the IAMCU ABI it also
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* supports the 'interrupt' attribute.
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*/
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static __inline__ void qm_int_vector_request(uint32_t vector, qm_isr_t isr)
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{
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_qm_register_isr(vector, isr);
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}
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#else /* __iamcu__ */
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/*
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* Using the standard SysV calling convention. A dummy (NULL in this case)
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* parameter is added to ISR handler, to maintain consistency with the API
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* imposed by the __attribute__((interrupt)) usage.
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*/
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#define qm_int_vector_request(vector, isr) \
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do { \
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__asm__ __volatile__("push $1f\n\t" \
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"push %0\n\t" \
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"call %P1\n\t" \
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"add $8, %%esp\n\t" \
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"jmp 2f\n\t" \
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".align 4\n\t" \
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"1:\n\t" \
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" pushal\n\t" \
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" push $0x00\n\t" \
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" call %P2\n\t" \
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" add $4, %%esp\n\t" \
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" popal\n\t" \
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" iret\n\t" \
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"2:\n\t" ::"g"(vector), \
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"i"(_qm_register_isr), "i"(isr) \
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: "%eax", "%ecx", "%edx"); \
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} while (0)
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#endif /* __iamcu__ */
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#endif /* UNIT_TEST */
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/**
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* @}
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*/
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#endif /* __QM_INTERRUPT_H__ */
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