242 lines
5.2 KiB
Plaintext
242 lines
5.2 KiB
Plaintext
/*
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* Copyright (c) 2017-2019 Intel Corporation.
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include "skeleton.dtsi"
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#include <dt-bindings/interrupt-controller/intel-ioapic.h>
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#include <dt-bindings/i2c/i2c.h>
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#include <dt-bindings/pcie/pcie.h>
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/ {
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cpus {
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#address-cells = <1>;
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#size-cells = <0>;
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cpu@0 {
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device_type = "cpu";
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compatible = "apollo_lake";
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reg = <0>;
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};
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};
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sram0: memory@100000 {
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device_type = "memory";
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compatible = "mmio-sram";
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reg = <0x00100000 DT_SRAM_SIZE>;
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};
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intc: ioapic@fec00000 {
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compatible = "intel,ioapic";
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reg = <0xfec00000 0x1000>;
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interrupt-controller;
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#interrupt-cells = <3>;
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};
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soc {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "simple-bus";
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ranges;
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uart0: uart@0 {
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compatible = "ns16550";
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pcie;
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reg = <PCIE_BDF(0,0x18,0) PCIE_ID(0x8086,0x5abc)>;
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label = "UART_0";
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clock-frequency = <1843200>;
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interrupts = <PCIE_IRQ_DETECT IRQ_TYPE_LEVEL_LOW 3>;
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interrupt-parent = <&intc>;
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status = "okay";
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current-speed = <115200>;
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};
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uart1: uart@1 {
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compatible = "ns16550";
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pcie;
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reg = <PCIE_BDF(0,0x18,1) PCIE_ID(0x8086,0x5abe)>;
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label = "UART_1";
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clock-frequency = <1843200>;
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interrupts = <PCIE_IRQ_DETECT IRQ_TYPE_LEVEL_LOW 3>;
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interrupt-parent = <&intc>;
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status = "okay";
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current-speed = <115200>;
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};
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uart2: uart@2 {
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compatible = "ns16550";
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pcie;
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reg = <PCIE_BDF(0,0x18,2) PCIE_ID(0x8086,0x5ac0)>;
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label = "UART_2";
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clock-frequency = <1843200>;
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interrupts = <PCIE_IRQ_DETECT IRQ_TYPE_LEVEL_LOW 3>;
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interrupt-parent = <&intc>;
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status = "okay";
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current-speed = <115200>;
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};
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uart3: uart@3 {
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compatible = "ns16550";
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pcie;
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reg = <PCIE_BDF(0,0x18,3) PCIE_ID(0x8086,0x5aee)>;
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label = "UART_3";
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clock-frequency = <1843200>;
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interrupts = <PCIE_IRQ_DETECT IRQ_TYPE_LEVEL_LOW 3>;
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interrupt-parent = <&intc>;
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status = "okay";
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current-speed = <115200>;
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};
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i2c0: i2c@0 {
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compatible = "snps,designware-i2c";
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clock-frequency = <I2C_BITRATE_STANDARD>;
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#address-cells = <1>;
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#size-cells = <0>;
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pcie;
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reg = <PCIE_BDF(0,0x16,0) PCIE_ID(0x8086,0x5aac)>;
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interrupts = <PCIE_IRQ_DETECT IRQ_TYPE_LEVEL_LOW 3>;
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interrupt-parent = <&intc>;
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label = "I2C_0";
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status = "okay";
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};
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i2c1: i2c@1 {
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compatible = "snps,designware-i2c";
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clock-frequency = <I2C_BITRATE_STANDARD>;
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#address-cells = <1>;
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#size-cells = <0>;
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pcie;
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reg = <PCIE_BDF(0,0x16,1) PCIE_ID(0x8086,0x5aae)>;
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interrupts = <PCIE_IRQ_DETECT IRQ_TYPE_LEVEL_LOW 3>;
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interrupt-parent = <&intc>;
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label = "I2C_1";
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status = "okay";
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};
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i2c2: i2c@2 {
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compatible = "snps,designware-i2c";
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clock-frequency = <I2C_BITRATE_STANDARD>;
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#address-cells = <1>;
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#size-cells = <0>;
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pcie;
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reg = <PCIE_BDF(0,0x16,2) PCIE_ID(0x8086,0x5ab0)>;
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interrupts = <PCIE_IRQ_DETECT IRQ_TYPE_LEVEL_LOW 3>;
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interrupt-parent = <&intc>;
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label = "I2C_2";
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status = "okay";
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};
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i2c3: i2c@3 {
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compatible = "snps,designware-i2c";
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clock-frequency = <I2C_BITRATE_STANDARD>;
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#address-cells = <1>;
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#size-cells = <0>;
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pcie;
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reg = <PCIE_BDF(0,0x16,3) PCIE_ID(0x8086,0x5ab2)>;
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interrupts = <PCIE_IRQ_DETECT IRQ_TYPE_LEVEL_LOW 3>;
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interrupt-parent = <&intc>;
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label = "I2C_3";
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status = "okay";
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};
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i2c4: i2c@4 {
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compatible = "snps,designware-i2c";
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clock-frequency = <I2C_BITRATE_STANDARD>;
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#address-cells = <1>;
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#size-cells = <0>;
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pcie;
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reg = <PCIE_BDF(0,0x17,0) PCIE_ID(0x8086,0x5ab4)>;
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interrupts = <PCIE_IRQ_DETECT IRQ_TYPE_LEVEL_LOW 3>;
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interrupt-parent = <&intc>;
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label = "I2C_4";
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status = "okay";
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};
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i2c5: i2c@5 {
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compatible = "snps,designware-i2c";
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clock-frequency = <I2C_BITRATE_STANDARD>;
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#address-cells = <1>;
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#size-cells = <0>;
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pcie;
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reg = <PCIE_BDF(0,0x17,1) PCIE_ID(0x8086,0x5ab6)>;
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interrupts = <PCIE_IRQ_DETECT IRQ_TYPE_LEVEL_LOW 3>;
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interrupt-parent = <&intc>;
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label = "I2C_5";
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status = "okay";
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};
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i2c6: i2c@6 {
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compatible = "snps,designware-i2c";
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clock-frequency = <I2C_BITRATE_STANDARD>;
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#address-cells = <1>;
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#size-cells = <0>;
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pcie;
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reg = <PCIE_BDF(0,0x17,2) PCIE_ID(0x8086,0x5ab8)>;
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interrupts = <PCIE_IRQ_DETECT IRQ_TYPE_LEVEL_LOW 3>;
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interrupt-parent = <&intc>;
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label = "I2C_6";
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status = "okay";
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};
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i2c7: i2c@7 {
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compatible = "snps,designware-i2c";
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clock-frequency = <I2C_BITRATE_STANDARD>;
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#address-cells = <1>;
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#size-cells = <0>;
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pcie;
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reg = <PCIE_BDF(0,0x17,3) PCIE_ID(0x8086,0x5aba)>;
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interrupts = <PCIE_IRQ_DETECT IRQ_TYPE_LEVEL_LOW 3>;
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interrupt-parent = <&intc>;
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label = "I2C_7";
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status = "okay";
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};
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gpio: gpio@d0c50000 {
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compatible = "intel,apl-gpio";
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reg = <0xd0c50000 0x1000>,
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<0xd0c40000 0x1000>,
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<0xd0c70000 0x1000>,
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<0xd0c00000 0x1000>;
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interrupts = <14 IRQ_TYPE_LEVEL_LOW 3>;
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interrupt-parent = <&intc>;
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label = "APL_GPIO";
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gpio-controller ;
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#gpio-cells = <2>;
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status = "okay";
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};
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hpet: hpet@fed00000 {
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label = "HPET";
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compatible = "intel,hpet";
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reg = <0xfed00000 0x400>;
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interrupts = <2 IRQ_TYPE_EDGE_RISING 4>;
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interrupt-parent = <&intc>;
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status = "okay";
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};
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};
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};
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