55 lines
2.5 KiB
C
55 lines
2.5 KiB
C
/**
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* \file
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*
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* \brief Instance description for SUPC
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*
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* Copyright (c) 2016 Atmel Corporation, a wholly owned subsidiary of Microchip Technology Inc.
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*
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* \license_start
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*
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* \page License
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*
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* Licensed under the Apache License, Version 2.0 (the "License");
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* you may not use this file except in compliance with the License.
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* You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS,
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* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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* See the License for the specific language governing permissions and
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* limitations under the License.
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*
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* \license_stop
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*
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*/
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#ifndef _SAME70_SUPC_INSTANCE_H_
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#define _SAME70_SUPC_INSTANCE_H_
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/* ========== Register definition for SUPC peripheral ========== */
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#if (defined(__ASSEMBLER__) || defined(__IAR_SYSTEMS_ASM__))
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#define REG_SUPC_CR (0x400E1810) /**< (SUPC) Supply Controller Control Register */
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#define REG_SUPC_SMMR (0x400E1814) /**< (SUPC) Supply Controller Supply Monitor Mode Register */
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#define REG_SUPC_MR (0x400E1818) /**< (SUPC) Supply Controller Mode Register */
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#define REG_SUPC_WUMR (0x400E181C) /**< (SUPC) Supply Controller Wake-up Mode Register */
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#define REG_SUPC_WUIR (0x400E1820) /**< (SUPC) Supply Controller Wake-up Inputs Register */
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#define REG_SUPC_SR (0x400E1824) /**< (SUPC) Supply Controller Status Register */
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#else
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#define REG_SUPC_CR (*(__O uint32_t*)0x400E1810U) /**< (SUPC) Supply Controller Control Register */
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#define REG_SUPC_SMMR (*(__IO uint32_t*)0x400E1814U) /**< (SUPC) Supply Controller Supply Monitor Mode Register */
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#define REG_SUPC_MR (*(__IO uint32_t*)0x400E1818U) /**< (SUPC) Supply Controller Mode Register */
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#define REG_SUPC_WUMR (*(__IO uint32_t*)0x400E181CU) /**< (SUPC) Supply Controller Wake-up Mode Register */
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#define REG_SUPC_WUIR (*(__IO uint32_t*)0x400E1820U) /**< (SUPC) Supply Controller Wake-up Inputs Register */
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#define REG_SUPC_SR (*(__I uint32_t*)0x400E1824U) /**< (SUPC) Supply Controller Status Register */
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#endif /* (defined(__ASSEMBLER__) || defined(__IAR_SYSTEMS_ASM__)) */
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/* ========== Instance Parameter definitions for SUPC peripheral ========== */
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#define SUPC_INSTANCE_ID 0
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#endif /* _SAME70_SUPC_INSTANCE_ */
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