zephyr

History

Ioannis Glaropoulos 12eb1e4038 soc: arm: nxp kinetis: force custom fixed MPU region configuration For the NXP Kinetis SoCs with the NXP MPU regions, we keep the confiruation of the fixed SoC MPU regions at each SoC definition. Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>		2019-12-09 11:51:14 -05:00
..
CMakeLists.txt	…
Kconfig.defconfig.mk64f12	kconfig: Clean up header comments and make them consistent	2019-11-04 17:31:27 -05:00
Kconfig.defconfig.series	soc: arm: nxp kinetis: force custom fixed MPU region configuration	2019-12-09 11:51:14 -05:00
Kconfig.series	kconfig: Clean up header comments and make them consistent	2019-11-04 17:31:27 -05:00
Kconfig.soc	kconfig: Clean up header comments and make them consistent	2019-11-04 17:31:27 -05:00
README.txt	…
dts_fixup.h	watchdog: Remove CONFIG_WDT_0_NAME usage	2019-11-06 13:51:20 -06:00
linker.ld	soc: nxp_kinetis: Make kinetis flash configuration field configurable	2019-09-13 13:58:46 -05:00
nxp_mpu_regions.c	soc: k64f MPU configured to always allow USB	2019-07-30 13:08:43 +03:00
soc.c	headers: Refactor kernel and arch headers.	2019-11-06 16:07:32 -08:00
soc.h	soc: arm: nxp: cleanup in soc.h headers	2019-09-23 18:02:00 -07:00
wdog.S	arm: arch code naming cleanup	2019-10-04 10:46:23 +02:00

README.txt

Notes on the FSL FRDM K64F SRAM base address and size

Although the K64F CPU has 64 kB of SRAM at 0x1FFF0000 (code space), it is not
used by the FSL FRDM K64F platform.  Only the 192 kB region based at the
standard ARMv7-M SRAM base address of 0x20000000 is supported.

As such the following values are used:

CONFIG_SRAM_BASE_ADDRESS=0x20000000
CONFIG_SRAM_SIZE=64      # Measured in kB