zephyr/dts/arm/st/f0/stm32f031.dtsi

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/*
* Copyright (c) 2021 Sebastian Schwabe <sebastian.schwabe@mailbox.tu-dresden.de>
*
* SPDX-License-Identifier: Apache-2.0
*/
#include <st/f0/stm32f0.dtsi>
/ {
soc {
flash-controller@40022000 {
flash0: flash@8000000 {
erase-block-size = <1024>;
};
};
timers2: timers@40000000 {
compatible = "st,stm32-timers";
reg = <0x40000000 0x400>;
clocks = <&rcc STM32_CLOCK_BUS_APB1 0x00000001>;
interrupts = <15 0>;
interrupt-names = "global";
st,prescaler = <0>;
status = "disabled";
pwm {
compatible = "st,stm32-pwm";
status = "disabled";
#pwm-cells = <3>;
};
};
};
};