80 lines
1.9 KiB
C
80 lines
1.9 KiB
C
/*
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* Copyright (c) 2022 Teslabs Engineering S.L.
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#define DT_DRV_COMPAT gd_gd32_rctl
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#include <zephyr/arch/cpu.h>
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#include <zephyr/device.h>
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#include <zephyr/devicetree.h>
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#include <zephyr/drivers/reset.h>
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/** RCU offset (from id field) */
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#define GD32_RESET_ID_OFFSET(id) (((id) >> 6U) & 0xFFU)
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/** RCU configuration bit (from id field) */
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#define GD32_RESET_ID_BIT(id) ((id) & 0x1FU)
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struct reset_gd32_config {
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uint32_t base;
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};
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static int reset_gd32_status(const struct device *dev, uint32_t id,
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uint8_t *status)
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{
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const struct reset_gd32_config *config = dev->config;
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*status = !!sys_test_bit(config->base + GD32_RESET_ID_OFFSET(id),
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GD32_RESET_ID_BIT(id));
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return 0;
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}
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static int reset_gd32_line_assert(const struct device *dev, uint32_t id)
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{
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const struct reset_gd32_config *config = dev->config;
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sys_set_bit(config->base + GD32_RESET_ID_OFFSET(id),
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GD32_RESET_ID_BIT(id));
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return 0;
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}
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static int reset_gd32_line_deassert(const struct device *dev, uint32_t id)
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{
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const struct reset_gd32_config *config = dev->config;
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sys_clear_bit(config->base + GD32_RESET_ID_OFFSET(id),
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GD32_RESET_ID_BIT(id));
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return 0;
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}
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static int reset_gd32_line_toggle(const struct device *dev, uint32_t id)
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{
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(void)reset_gd32_line_assert(dev, id);
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(void)reset_gd32_line_deassert(dev, id);
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return 0;
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}
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static const struct reset_driver_api reset_gd32_driver_api = {
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.status = reset_gd32_status,
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.line_assert = reset_gd32_line_assert,
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.line_deassert = reset_gd32_line_deassert,
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.line_toggle = reset_gd32_line_toggle,
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};
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static int reset_gd32_init(const struct device *dev)
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{
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return 0;
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}
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static const struct reset_gd32_config config = {
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.base = DT_REG_ADDR(DT_INST_PARENT(0)),
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};
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DEVICE_DT_INST_DEFINE(0, reset_gd32_init, NULL, NULL, &config, PRE_KERNEL_1,
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CONFIG_RESET_INIT_PRIORITY, &reset_gd32_driver_api);
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