114 lines
2.8 KiB
C
114 lines
2.8 KiB
C
/*
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* Copyright (c) 2016 Open-RnD Sp. z o.o.
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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/**
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* @file header for STM32 pin multiplexing
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*/
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#ifndef ZEPHYR_DRIVERS_PINMUX_STM32_PINMUX_STM32_H_
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#define ZEPHYR_DRIVERS_PINMUX_STM32_PINMUX_STM32_H_
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#include <zephyr/types.h>
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#include <zephyr/drivers/clock_control.h>
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#if DT_HAS_COMPAT_STATUS_OKAY(st_stm32f1_pinctrl)
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#include <zephyr/dt-bindings/pinctrl/stm32f1-pinctrl.h>
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#else
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#include <zephyr/dt-bindings/pinctrl/stm32-pinctrl.h>
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#endif /* DT_HAS_COMPAT_STATUS_OKAY(st_stm32f1_pinctrl) */
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#ifdef __cplusplus
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extern "C" {
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#endif
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/**
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* @brief structure to convey pinctrl information for stm32 soc
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* value
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*/
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struct soc_gpio_pinctrl {
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uint32_t pinmux;
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uint32_t pincfg;
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};
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/**
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* @brief helper to extract IO port number from STM32_PINMUX() encoded
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* value
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*/
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#define STM32_DT_PINMUX_PORT(__pin) \
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(((__pin) >> STM32_PORT_SHIFT) & STM32_PORT_MASK)
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/**
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* @brief helper to extract IO pin number from STM32_PINMUX() encoded
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* value
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*/
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#define STM32_DT_PINMUX_LINE(__pin) \
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(((__pin) >> STM32_LINE_SHIFT) & STM32_LINE_MASK)
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/**
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* @brief helper to extract IO pin func from STM32_PINMUX() encoded
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* value
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*/
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#define STM32_DT_PINMUX_FUNC(__pin) \
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(((__pin) >> STM32_MODE_SHIFT) & STM32_MODE_MASK)
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#if DT_HAS_COMPAT_STATUS_OKAY(st_stm32f1_pinctrl)
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/**
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* @brief helper to extract IO pin remap from STM32_PINMUX() encoded
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* value
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*/
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#define STM32_DT_PINMUX_REMAP(__pin) \
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(((__pin) >> STM32_REMAP_SHIFT) & STM32_REMAP_MASK)
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#endif
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/**
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* @brief helper to extract IO port number from STM32PIN() encoded
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* value
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*/
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#define STM32_PORT(__pin) \
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((__pin) >> 4)
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/**
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* @brief helper to extract IO pin number from STM32PIN() encoded
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* value
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*/
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#define STM32_PIN(__pin) \
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((__pin) & 0xf)
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/**
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* @brief helper for converting dt stm32 pinctrl format to existing pin config
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* format
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*
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* @param *pinctrl pointer to soc_gpio_pinctrl list
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* @param list_size list size
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* @param base device base register value
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*
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* @return 0 on success, -EINVAL otherwise
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*/
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int stm32_dt_pinctrl_configure(const struct soc_gpio_pinctrl *pinctrl,
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size_t list_size, uint32_t base);
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#if DT_HAS_COMPAT_STATUS_OKAY(st_stm32f1_pinctrl)
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/**
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* @brief Helper function to check and apply provided pinctrl remap
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* configuration
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*
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* Check operation verifies that pin remapping configuration is the same on all
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* pins. If configuration is valid AFIO clock is enabled and remap is applied
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*
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* @param *pinctrl pointer to soc_gpio_pinctrl list
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* @param list_size list size
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*
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* @return 0 value on success, -EINVAL otherwise
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*/
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int stm32_dt_pinctrl_remap(const struct soc_gpio_pinctrl *pinctrl,
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size_t list_size);
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#endif /* DT_HAS_COMPAT_STATUS_OKAY(st_stm32f1_pinctrl) */
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#ifdef __cplusplus
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}
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#endif
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#endif /* ZEPHYR_DRIVERS_PINMUX_STM32_PINMUX_STM32_H_ */
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