47 lines
1.3 KiB
Plaintext
47 lines
1.3 KiB
Plaintext
CONFIG_ARM=y
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CONFIG_BOARD_NUCLEO_F103RB=y
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CONFIG_SOC_FAMILY_STM32=y
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CONFIG_SOC_SERIES_STM32F1X=y
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CONFIG_SOC_STM32F103RB=y
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CONFIG_CORTEX_M_SYSTICK=y
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# 72MHz system clock
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CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=72000000
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# enable uart driver
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CONFIG_SERIAL=y
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CONFIG_UART_STM32=y
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# enable USART2 - passthrough to STLINK v2 connector
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CONFIG_UART_STM32_PORT_1=y
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CONFIG_UART_STM32_PORT_1_BAUD_RATE=115200
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# enable console on this port by default
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CONFIG_CONSOLE=y
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CONFIG_UART_CONSOLE=y
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CONFIG_UART_CONSOLE_ON_DEV_NAME="UART_1"
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# enable pinmux
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CONFIG_PINMUX=y
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CONFIG_PINMUX_STM32=y
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# enable GPIO ports A, B, C
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CONFIG_GPIO=y
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CONFIG_GPIO_STM32=y
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CONFIG_GPIO_STM32_PORTA=y
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CONFIG_GPIO_STM32_PORTB=y
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CONFIG_GPIO_STM32_PORTC=y
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# clock configuration
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CONFIG_CLOCK_CONTROL=y
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CONFIG_CLOCK_CONTROL_STM32F10X=y
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CONFIG_CLOCK_STM32F10X_SYSCLK_SRC_PLL=y
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# use HSE as PLL input
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CONFIG_CLOCK_STM32F10X_PLL_SRC_HSE=y
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# however, the board does not have an external oscillator, so just use
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# the 8MHz clock signal coming from integrated STLink
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CONFIG_CLOCK_STM32F10X_HSE_BYPASS=y
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# produce 72MHz clock at PLL output
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CONFIG_CLOCK_STM32F10X_PLL_MULTIPLIER=9
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CONFIG_CLOCK_STM32F10X_AHB_PRESCALER=0
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# APB1 clock must not to exceed 36MHz limit
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CONFIG_CLOCK_STM32F10X_APB1_PRESCALER=2
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CONFIG_CLOCK_STM32F10X_APB2_PRESCALER=0
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