453 lines
11 KiB
C
453 lines
11 KiB
C
/*
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* Copyright (c) 2016 Open-RnD Sp. z o.o.
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*
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* Licensed under the Apache License, Version 2.0 (the "License");
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* you may not use this file except in compliance with the License.
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* You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS,
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* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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* See the License for the specific language governing permissions and
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* limitations under the License.
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*/
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/**
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* @brief Driver for External interrupt/event controller in STM32 MCUs
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*
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* Based on reference manuals:
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* RM0008 Reference Manual: STM32F101xx, STM32F102xx, STM32F103xx, STM32F105xx
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* and STM32F107xx advanced ARM-based 32-bit MCUs
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* and
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* RM0368 Reference manual STM32F401xB/C and STM32F401xD/E
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* advanced ARM-based 32-bit MCUs
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*
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* Chapter 10.2: External interrupt/event controller (EXTI)
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*
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*/
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#include <device.h>
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#include <soc.h>
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#include <misc/__assert.h>
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#include "exti_stm32.h"
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#ifdef CONFIG_SOC_SERIES_STM32F1X
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#define EXTI_LINES 19
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#elif CONFIG_SOC_SERIES_STM32F4X
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#define EXTI_LINES 23
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#elif defined(CONFIG_SOC_SERIES_STM32L4X)
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#define EXTI_LINES 40
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#endif
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/* 10.3.7 EXTI register map */
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struct stm32_exti {
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/* EXTI_IMR */
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uint32_t imr;
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/* EXTI_EMR */
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uint32_t emr;
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/* EXTI_RTSR */
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uint32_t rtsr;
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/* EXTI_FTSR */
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uint32_t ftsr;
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/* EXTI_SWIER */
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uint32_t swier;
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/* EXTI_PR */
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uint32_t pr;
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};
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/* wrapper for user callback */
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struct __exti_cb {
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stm32_exti_callback_t cb;
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void *data;
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};
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/* driver data */
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struct stm32_exti_data {
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/* per-line callbacks */
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struct __exti_cb cb[EXTI_LINES];
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};
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/*
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* return the proper base addr based on the line number, also we adjust
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* the line number to be relative to the base, we do this here to save
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* a bit of code size
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*/
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static inline struct stm32_exti *get_exti_addr_adjust_line(int *line)
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{
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struct stm32_exti *base = (struct stm32_exti *)EXTI_BASE;
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#if EXTI_LINES > 32
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if (*line > 31) {
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*line -= 32;
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return base + 1;
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}
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#endif
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return base;
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}
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void stm32_exti_enable(int line)
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{
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volatile struct stm32_exti *exti = get_exti_addr_adjust_line(&line);
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int irqnum = 0;
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exti->imr |= 1 << line;
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#ifdef CONFIG_SOC_SERIES_STM32F1X
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if (line >= 5 && line <= 9) {
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irqnum = STM32F1_IRQ_EXTI9_5;
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} else if (line >= 10 && line <= 15) {
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irqnum = STM32F1_IRQ_EXTI15_10;
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} else {
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/* pins 0..4 are mapped to EXTI0.. EXTI4 */
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irqnum = STM32F1_IRQ_EXTI0 + line;
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}
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#elif CONFIG_SOC_SERIES_STM32F4X
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if (line >= 5 && line <= 9) {
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irqnum = STM32F4_IRQ_EXTI9_5;
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} else if (line >= 10 && line <= 15) {
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irqnum = STM32F4_IRQ_EXTI15_10;
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} else if (line >= 0 && line <= 4) {
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/* pins 0..4 are mapped to EXTI0.. EXTI4 */
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irqnum = STM32F4_IRQ_EXTI0 + line;
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} else {
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switch (line) {
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case 16:
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irqnum = STM32F4_IRQ_EXTI16;
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break;
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case 17:
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irqnum = STM32F4_IRQ_EXTI17;
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break;
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case 18:
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irqnum = STM32F4_IRQ_EXTI18;
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break;
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case 21:
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irqnum = STM32F4_IRQ_EXTI21;
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break;
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case 22:
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irqnum = STM32F4_IRQ_EXTI22;
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break;
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}
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}
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#elif defined(CONFIG_SOC_SERIES_STM32L4X)
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if (line >= 5 && line <= 9) {
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irqnum = STM32L4_IRQ_EXTI9_5;
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} else if (line >= 10 && line <= 15) {
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irqnum = STM32L4_IRQ_EXTI15_10;
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} else if (line < 5) {
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/* pins 0..4 are mapped to EXTI0.. EXTI4 */
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irqnum = STM32L4_IRQ_EXTI0 + line;
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} else {/* > 15 are not mapped on an IRQ */
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/*
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* On STM32L4X, this function also support enabling EXTI
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* lines that are not connected to an IRQ. This might be used
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* by other drivers or boards, to allow the device wakeup on
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* some non-GPIO signals.
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*/
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return;
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}
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#else
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#error "Unknown STM32 SoC"
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#endif
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irq_enable(irqnum);
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}
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void stm32_exti_disable(int line)
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{
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volatile struct stm32_exti *exti = get_exti_addr_adjust_line(&line);
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exti->imr &= ~(1 << line);
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}
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/**
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* @brief check if interrupt is pending
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*
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* @param line line number
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*/
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static inline int stm32_exti_is_pending(int line)
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{
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volatile struct stm32_exti *exti = get_exti_addr_adjust_line(&line);
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return (exti->pr & (1 << line)) ? 1 : 0;
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}
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/**
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* @brief clear pending interrupt bit
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*
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* @param line line number
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*/
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static inline void stm32_exti_clear_pending(int line)
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{
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volatile struct stm32_exti *exti = get_exti_addr_adjust_line(&line);
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exti->pr = 1 << line;
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}
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void stm32_exti_trigger(int line, int trigger)
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{
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volatile struct stm32_exti *exti = get_exti_addr_adjust_line(&line);
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if (trigger & STM32_EXTI_TRIG_RISING) {
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exti->rtsr |= 1 << line;
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}
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if (trigger & STM32_EXTI_TRIG_FALLING) {
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exti->ftsr |= 1 << line;
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}
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}
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/**
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* @brief EXTI ISR handler
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*
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* Check EXTI lines in range @min @max for pending interrupts
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*
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* @param arg isr argument
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* @parram min low end of EXTI# range
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* @parram max low end of EXTI# range
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*/
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static void __stm32_exti_isr(int min, int max, void *arg)
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{
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struct device *dev = arg;
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struct stm32_exti_data *data = dev->driver_data;
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int line;
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/* see which bits are set */
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for (line = min; line < max; line++) {
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/* check if interrupt is pending */
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if (stm32_exti_is_pending(line)) {
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/* clear pending interrupt */
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stm32_exti_clear_pending(line);
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/* run callback only if one is registered */
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if (!data->cb[line].cb) {
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continue;
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}
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data->cb[line].cb(line, data->cb[line].data);
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}
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}
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}
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static inline void __stm32_exti_isr_0(void *arg)
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{
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__stm32_exti_isr(0, 1, arg);
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}
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static inline void __stm32_exti_isr_1(void *arg)
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{
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__stm32_exti_isr(1, 2, arg);
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}
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static inline void __stm32_exti_isr_2(void *arg)
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{
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__stm32_exti_isr(2, 3, arg);
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}
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static inline void __stm32_exti_isr_3(void *arg)
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{
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__stm32_exti_isr(3, 4, arg);
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}
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static inline void __stm32_exti_isr_4(void *arg)
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{
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__stm32_exti_isr(4, 5, arg);
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}
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static inline void __stm32_exti_isr_9_5(void *arg)
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{
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__stm32_exti_isr(5, 10, arg);
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}
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static inline void __stm32_exti_isr_15_10(void *arg)
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{
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__stm32_exti_isr(10, 16, arg);
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}
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#ifdef CONFIG_SOC_SERIES_STM32F4X
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static inline void __stm32_exti_isr_16(void *arg)
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{
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__stm32_exti_isr(16, 17, arg);
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}
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static inline void __stm32_exti_isr_17(void *arg)
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{
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__stm32_exti_isr(17, 18, arg);
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}
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static inline void __stm32_exti_isr_18(void *arg)
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{
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__stm32_exti_isr(18, 19, arg);
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}
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static inline void __stm32_exti_isr_21(void *arg)
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{
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__stm32_exti_isr(21, 22, arg);
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}
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static inline void __stm32_exti_isr_22(void *arg)
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{
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__stm32_exti_isr(22, 23, arg);
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}
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#endif /* CONFIG_SOC_SERIES_STM32F4X */
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static void __stm32_exti_connect_irqs(struct device *dev);
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/**
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* @brief initialize EXTI device driver
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*/
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static int stm32_exti_init(struct device *dev)
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{
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__stm32_exti_connect_irqs(dev);
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return 0;
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}
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static struct stm32_exti_data exti_data;
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DEVICE_INIT(exti_stm32, STM32_EXTI_NAME, stm32_exti_init,
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&exti_data, NULL,
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PRE_KERNEL_1, CONFIG_KERNEL_INIT_PRIORITY_DEVICE);
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/**
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* @brief set & unset for the interrupt callbacks
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*/
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void stm32_exti_set_callback(int line, stm32_exti_callback_t cb, void *arg)
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{
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struct device *dev = DEVICE_GET(exti_stm32);
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struct stm32_exti_data *data = dev->driver_data;
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__ASSERT(data->cb[line].cb == NULL,
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"EXTI %d callback already registered", line);
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data->cb[line].cb = cb;
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data->cb[line].data = arg;
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}
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void stm32_exti_unset_callback(int line)
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{
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struct device *dev = DEVICE_GET(exti_stm32);
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struct stm32_exti_data *data = dev->driver_data;
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data->cb[line].cb = NULL;
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data->cb[line].data = NULL;
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}
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/**
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* @brief connect all interrupts
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*/
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static void __stm32_exti_connect_irqs(struct device *dev)
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{
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ARG_UNUSED(dev);
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#ifdef CONFIG_SOC_SERIES_STM32F1X
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IRQ_CONNECT(STM32F1_IRQ_EXTI0,
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CONFIG_EXTI_STM32_EXTI0_IRQ_PRI,
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__stm32_exti_isr_0, DEVICE_GET(exti_stm32),
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0);
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IRQ_CONNECT(STM32F1_IRQ_EXTI1,
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CONFIG_EXTI_STM32_EXTI1_IRQ_PRI,
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__stm32_exti_isr_1, DEVICE_GET(exti_stm32),
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0);
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IRQ_CONNECT(STM32F1_IRQ_EXTI2,
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CONFIG_EXTI_STM32_EXTI2_IRQ_PRI,
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__stm32_exti_isr_2, DEVICE_GET(exti_stm32),
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0);
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IRQ_CONNECT(STM32F1_IRQ_EXTI3,
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CONFIG_EXTI_STM32_EXTI3_IRQ_PRI,
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__stm32_exti_isr_3, DEVICE_GET(exti_stm32),
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0);
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IRQ_CONNECT(STM32F1_IRQ_EXTI4,
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CONFIG_EXTI_STM32_EXTI4_IRQ_PRI,
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__stm32_exti_isr_4, DEVICE_GET(exti_stm32),
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0);
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IRQ_CONNECT(STM32F1_IRQ_EXTI9_5,
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CONFIG_EXTI_STM32_EXTI9_5_IRQ_PRI,
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__stm32_exti_isr_9_5, DEVICE_GET(exti_stm32),
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0);
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IRQ_CONNECT(STM32F1_IRQ_EXTI15_10,
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CONFIG_EXTI_STM32_EXTI15_10_IRQ_PRI,
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__stm32_exti_isr_15_10, DEVICE_GET(exti_stm32),
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0);
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#elif CONFIG_SOC_SERIES_STM32F4X
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IRQ_CONNECT(STM32F4_IRQ_EXTI0,
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CONFIG_EXTI_STM32_EXTI0_IRQ_PRI,
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__stm32_exti_isr_0, DEVICE_GET(exti_stm32),
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0);
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IRQ_CONNECT(STM32F4_IRQ_EXTI1,
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CONFIG_EXTI_STM32_EXTI1_IRQ_PRI,
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__stm32_exti_isr_1, DEVICE_GET(exti_stm32),
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0);
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IRQ_CONNECT(STM32F4_IRQ_EXTI2,
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CONFIG_EXTI_STM32_EXTI2_IRQ_PRI,
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__stm32_exti_isr_2, DEVICE_GET(exti_stm32),
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0);
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IRQ_CONNECT(STM32F4_IRQ_EXTI3,
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CONFIG_EXTI_STM32_EXTI3_IRQ_PRI,
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__stm32_exti_isr_3, DEVICE_GET(exti_stm32),
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0);
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IRQ_CONNECT(STM32F4_IRQ_EXTI4,
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CONFIG_EXTI_STM32_EXTI4_IRQ_PRI,
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__stm32_exti_isr_4, DEVICE_GET(exti_stm32),
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0);
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IRQ_CONNECT(STM32F4_IRQ_EXTI9_5,
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CONFIG_EXTI_STM32_EXTI9_5_IRQ_PRI,
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__stm32_exti_isr_9_5, DEVICE_GET(exti_stm32),
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0);
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IRQ_CONNECT(STM32F4_IRQ_EXTI15_10,
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CONFIG_EXTI_STM32_EXTI15_10_IRQ_PRI,
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__stm32_exti_isr_15_10, DEVICE_GET(exti_stm32),
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0);
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IRQ_CONNECT(STM32F4_IRQ_EXTI16,
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CONFIG_EXTI_STM32_EXTI16_IRQ_PRI,
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__stm32_exti_isr_16, DEVICE_GET(exti_stm32),
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0);
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IRQ_CONNECT(STM32F4_IRQ_EXTI17,
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CONFIG_EXTI_STM32_EXTI17_IRQ_PRI,
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__stm32_exti_isr_17, DEVICE_GET(exti_stm32),
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0);
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IRQ_CONNECT(STM32F4_IRQ_EXTI18,
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CONFIG_EXTI_STM32_EXTI18_IRQ_PRI,
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__stm32_exti_isr_18, DEVICE_GET(exti_stm32),
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0);
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IRQ_CONNECT(STM32F4_IRQ_EXTI21,
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CONFIG_EXTI_STM32_EXTI21_IRQ_PRI,
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__stm32_exti_isr_21, DEVICE_GET(exti_stm32),
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0);
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IRQ_CONNECT(STM32F4_IRQ_EXTI22,
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CONFIG_EXTI_STM32_EXTI22_IRQ_PRI,
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__stm32_exti_isr_22, DEVICE_GET(exti_stm32),
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0);
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#elif defined(CONFIG_SOC_SERIES_STM32L4X)
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IRQ_CONNECT(STM32L4_IRQ_EXTI0,
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CONFIG_EXTI_STM32_EXTI0_IRQ_PRI,
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__stm32_exti_isr_0, DEVICE_GET(exti_stm32),
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0);
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IRQ_CONNECT(STM32L4_IRQ_EXTI1,
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CONFIG_EXTI_STM32_EXTI1_IRQ_PRI,
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__stm32_exti_isr_1, DEVICE_GET(exti_stm32),
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0);
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IRQ_CONNECT(STM32L4_IRQ_EXTI2,
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CONFIG_EXTI_STM32_EXTI2_IRQ_PRI,
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__stm32_exti_isr_2, DEVICE_GET(exti_stm32),
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0);
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IRQ_CONNECT(STM32L4_IRQ_EXTI3,
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CONFIG_EXTI_STM32_EXTI3_IRQ_PRI,
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__stm32_exti_isr_3, DEVICE_GET(exti_stm32),
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0);
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IRQ_CONNECT(STM32L4_IRQ_EXTI4,
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CONFIG_EXTI_STM32_EXTI4_IRQ_PRI,
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__stm32_exti_isr_4, DEVICE_GET(exti_stm32),
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0);
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IRQ_CONNECT(STM32L4_IRQ_EXTI9_5,
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CONFIG_EXTI_STM32_EXTI9_5_IRQ_PRI,
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__stm32_exti_isr_9_5, DEVICE_GET(exti_stm32),
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0);
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IRQ_CONNECT(STM32L4_IRQ_EXTI15_10,
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CONFIG_EXTI_STM32_EXTI15_10_IRQ_PRI,
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__stm32_exti_isr_15_10, DEVICE_GET(exti_stm32),
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0);
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#endif
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}
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