80a9b02200
The STM32L4x2 SoCs need to control the isolation of the USB features from VDDUSB. This is done through the PWR_CR2 bit USV, however the current code checks for the PWR_CR2_PVME1 bit instead, which is only available on Cat. 3 devices. This bug is also present int the HAL and likely copied from there. Replace the check by PWR_CR2_USV instead. Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> |
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CMakeLists.txt | ||
Kconfig | ||
usb_dc_dw.c | ||
usb_dc_kinetis.c | ||
usb_dc_nrf5.c | ||
usb_dc_sam0.c | ||
usb_dc_stm32.c | ||
usb_dw_registers.h |