159 lines
4.6 KiB
C
159 lines
4.6 KiB
C
/*
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* Copyright (c) 2013-2014 Wind River Systems, Inc.
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*
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* Licensed under the Apache License, Version 2.0 (the "License");
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* you may not use this file except in compliance with the License.
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* You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS,
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* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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* See the License for the specific language governing permissions and
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* limitations under the License.
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*/
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/**
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* @file
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* @brief New thread creation for ARM Cortex-M
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*
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* Core nanokernel fiber related primitives for the ARM Cortex-M processor
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* architecture.
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*/
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#include <nanokernel.h>
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#include <arch/cpu.h>
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#include <toolchain.h>
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#include <nano_private.h>
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#include <wait_q.h>
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#ifdef CONFIG_INIT_STACKS
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#include <string.h>
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#endif /* CONFIG_INIT_STACKS */
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tNANO _nanokernel = {0};
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#if defined(CONFIG_THREAD_MONITOR)
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/*
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* Add a thread to the kernel's list of active threads.
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*/
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static ALWAYS_INLINE void thread_monitor_init(struct tcs *tcs)
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{
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unsigned int key;
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key = irq_lock();
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tcs->next_thread = _nanokernel.threads;
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_nanokernel.threads = tcs;
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irq_unlock(key);
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}
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#else
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#define thread_monitor_init(tcs) \
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do {/* do nothing */ \
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} while ((0))
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#endif /* CONFIG_THREAD_MONITOR */
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/**
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*
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* @brief Intialize a new thread from its stack space
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*
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* The control structure (TCS) is put at the lower address of the stack. An
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* initial context, to be "restored" by __pendsv(), is put at the other end of
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* the stack, and thus reusable by the stack when not needed anymore.
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*
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* The initial context is an exception stack frame (ESF) since exiting the
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* PendSV exception will want to pop an ESF. Interestingly, even if the lsb of
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* an instruction address to jump to must always be set since the CPU always
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* runs in thumb mode, the ESF expects the real address of the instruction,
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* with the lsb *not* set (instructions are always aligned on 16 bit halfwords).
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* Since the compiler automatically sets the lsb of function addresses, we have
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* to unset it manually before storing it in the 'pc' field of the ESF.
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*
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* <options> is currently unused.
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*
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* @param pStackMem the aligned stack memory
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* @param stackSize stack size in bytes
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* @param pEntry the entry point
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* @param parameter1 entry point to the first param
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* @param parameter2 entry point to the second param
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* @param parameter3 entry point to the third param
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* @param priority thread priority
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* @param options thread options: ESSENTIAL, USE_FP
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*
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* @return N/A
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*/
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void _new_thread(char *pStackMem, unsigned stackSize,
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void *uk_task_ptr, _thread_entry_t pEntry,
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void *parameter1, void *parameter2, void *parameter3,
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int priority, unsigned options)
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{
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__ASSERT(!((uint32_t)pStackMem & (STACK_ALIGN - 1)),
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"stack is not aligned properly\n"
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"%d-byte alignment required\n", STACK_ALIGN);
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char *stackEnd = pStackMem + stackSize;
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struct __esf *pInitCtx;
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struct tcs *tcs = (struct tcs *) pStackMem;
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#ifdef CONFIG_INIT_STACKS
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memset(pStackMem, 0xaa, stackSize);
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#endif
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/* carve the thread entry struct from the "base" of the stack */
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pInitCtx = (struct __esf *)(STACK_ROUND_DOWN(stackEnd) -
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sizeof(struct __esf));
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pInitCtx->pc = ((uint32_t)_thread_entry) & 0xfffffffe;
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pInitCtx->a1 = (uint32_t)pEntry;
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pInitCtx->a2 = (uint32_t)parameter1;
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pInitCtx->a3 = (uint32_t)parameter2;
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pInitCtx->a4 = (uint32_t)parameter3;
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pInitCtx->xpsr =
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0x01000000UL; /* clear all, thumb bit is 1, even if RO */
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#ifdef CONFIG_KERNEL_V2
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/* k_q_node initialized upon first insertion in a list */
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tcs->flags = options | K_PRESTART;
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tcs->sched_locked = 0;
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/* static threads overwrite it afterwards with real value */
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tcs->init_data = NULL;
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tcs->fn_abort = NULL;
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#else
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tcs->link = NULL;
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tcs->flags = priority == -1 ? TASK | PREEMPTIBLE : FIBER;
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ARG_UNUSED(options);
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#endif
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tcs->prio = priority;
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#ifdef CONFIG_THREAD_CUSTOM_DATA
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/* Initialize custom data field (value is opaque to kernel) */
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tcs->custom_data = NULL;
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#endif
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#ifdef CONFIG_THREAD_MONITOR
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/*
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* In debug mode tcs->entry give direct access to the thread entry
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* and the corresponding parameters.
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*/
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tcs->entry = (struct __thread_entry *)(pInitCtx);
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#endif
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#if !defined(CONFIG_KERNEL_V2) && defined(CONFIG_MICROKERNEL)
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tcs->uk_task_ptr = uk_task_ptr;
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#else
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ARG_UNUSED(uk_task_ptr);
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#endif
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tcs->preempReg.psp = (uint32_t)pInitCtx;
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tcs->basepri = 0;
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_nano_timeout_tcs_init(tcs);
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/* initial values in all other registers/TCS entries are irrelevant */
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thread_monitor_init(tcs);
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}
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